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flash: nand: move in include file the declaration of 'nand_devices'
[openocd.git] / src / flash / nand / at91sam9.c
diff --git a/src/flash/nand/at91sam9.c b/src/flash/nand/at91sam9.c
index 3f4e5e277b0f981e7f435e0e085c14a3fb1b9d84..bfbba67c4cbf7236f18b903b3ab4490c72b3b41d 100644 (file)
--- a/src/flash/nand/at91sam9.c
+++ b/src/flash/nand/at91sam9.c
@@ -1,21 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
 /*
  * Copyright (C) 2009 by Dean Glazeski
  * dnglaze@gmail.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the
- * Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  */
 
 #ifdef HAVE_CONFIG_H
@@ -27,13 +14,13 @@
 #include "imp.h"
 #include "arm_io.h"
 
-#define AT91C_PIOx_SODR (0x30) /**< Offset to PIO SODR. */
-#define AT91C_PIOx_CODR (0x34) /**< Offset to PIO CODR. */
-#define AT91C_PIOx_PDSR (0x3C) /**< Offset to PIO PDSR. */
-#define AT91C_ECCx_CR (0x00)   /**< Offset to ECC CR. */
-#define AT91C_ECCx_SR (0x08)   /**< Offset to ECC SR. */
-#define AT91C_ECCx_PR (0x0C)   /**< Offset to ECC PR. */
-#define AT91C_ECCx_NPR (0x10)  /**< Offset to ECC NPR. */
+#define AT91C_PIOX_SODR (0x30) /**< Offset to PIO SODR. */
+#define AT91C_PIOX_CODR (0x34) /**< Offset to PIO CODR. */
+#define AT91C_PIOX_PDSR (0x3C) /**< Offset to PIO PDSR. */
+#define AT91C_ECCX_CR (0x00)   /**< Offset to ECC CR. */
+#define AT91C_ECCX_SR (0x08)   /**< Offset to ECC SR. */
+#define AT91C_ECCX_PR (0x0C)   /**< Offset to ECC PR. */
+#define AT91C_ECCX_NPR (0x10)  /**< Offset to ECC NPR. */
 
 /**
  * Representation of a pin on an AT91SAM9 chip.
@@ -107,7 +94,7 @@ static int at91sam9_init(struct nand_device *nand)
 /**
  * Enable NAND device attached to a controller.
  *
- * @param info NAND controller information for controlling NAND device.
+ * @param nand NAND controller information for controlling NAND device.
  * @return Success or failure of the enabling.
  */
 static int at91sam9_enable(struct nand_device *nand)
@@ -115,13 +102,13 @@ static int at91sam9_enable(struct nand_device *nand)
        struct at91sam9_nand *info = nand->controller_priv;
        struct target *target = nand->target;
 
-       return target_write_u32(target, info->ce.pioc + AT91C_PIOx_CODR, 1 << info->ce.num);
+       return target_write_u32(target, info->ce.pioc + AT91C_PIOX_CODR, 1 << info->ce.num);
 }
 
 /**
  * Disable NAND device attached to a controller.
  *
- * @param info NAND controller information for controlling NAND device.
+ * @param nand NAND controller information for controlling NAND device.
  * @return Success or failure of the disabling.
  */
 static int at91sam9_disable(struct nand_device *nand)
@@ -129,7 +116,7 @@ static int at91sam9_disable(struct nand_device *nand)
        struct at91sam9_nand *info = nand->controller_priv;
        struct target *target = nand->target;
 
-       return target_write_u32(target, info->ce.pioc + AT91C_PIOx_SODR, 1 << info->ce.num);
+       return target_write_u32(target, info->ce.pioc + AT91C_PIOX_SODR, 1 << info->ce.num);
 }
 
 /**
@@ -239,7 +226,7 @@ static int at91sam9_nand_ready(struct nand_device *nand, int timeout)
                return 0;
 
        do {
-               target_read_u32(target, info->busy.pioc + AT91C_PIOx_PDSR, &status);
+               target_read_u32(target, info->busy.pioc + AT91C_PIOX_PDSR, &status);
 
                if (status & (1 << info->busy.num))
                        return 1;
@@ -313,7 +300,7 @@ static int at91sam9_ecc_init(struct target *target, struct at91sam9_nand *info)
        }
 
        /* reset ECC parity registers */
-       return target_write_u32(target, info->ecc + AT91C_ECCx_CR, 1);
+       return target_write_u32(target, info->ecc + AT91C_ECCX_CR, 1);
 }
 
 /**
@@ -370,23 +357,23 @@ static int at91sam9_read_page(struct nand_device *nand, uint32_t page,
        uint32_t status;
 
        retval = at91sam9_ecc_init(target, info);
-       if (ERROR_OK != retval)
+       if (retval != ERROR_OK)
                return retval;
 
        retval = nand_page_command(nand, page, NAND_CMD_READ0, !data);
-       if (ERROR_OK != retval)
+       if (retval != ERROR_OK)
                return retval;
 
        if (data) {
                retval = nand_read_data_page(nand, data, data_size);
-               if (ERROR_OK != retval)
+               if (retval != ERROR_OK)
                        return retval;
        }
 
        oob_data = at91sam9_oob_init(nand, oob, &oob_size);
        retval = nand_read_data_page(nand, oob_data, oob_size);
-       if (ERROR_OK == retval && data) {
-               target_read_u32(target, info->ecc + AT91C_ECCx_SR, &status);
+       if (retval == ERROR_OK && data) {
+               target_read_u32(target, info->ecc + AT91C_ECCX_SR, &status);
                if (status & 1) {
                        LOG_ERROR("Error detected!");
                        if (status & 4)
@@ -396,7 +383,7 @@ static int at91sam9_read_page(struct nand_device *nand, uint32_t page,
                                uint32_t parity;
 
                                target_read_u32(target,
-                                       info->ecc + AT91C_ECCx_PR,
+                                       info->ecc + AT91C_ECCX_PR,
                                        &parity);
                                uint32_t word = (parity & 0x0000FFF0) >> 4;
                                uint32_t bit = parity & 0x0F;
@@ -445,16 +432,16 @@ static int at91sam9_write_page(struct nand_device *nand, uint32_t page,
        uint32_t parity, nparity;
 
        retval = at91sam9_ecc_init(target, info);
-       if (ERROR_OK != retval)
+       if (retval != ERROR_OK)
                return retval;
 
        retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
-       if (ERROR_OK != retval)
+       if (retval != ERROR_OK)
                return retval;
 
        if (data) {
                retval = nand_write_data_page(nand, data, data_size);
-               if (ERROR_OK != retval) {
+               if (retval != ERROR_OK) {
                        LOG_ERROR("Unable to write data to NAND device");
                        return retval;
                }
@@ -464,8 +451,8 @@ static int at91sam9_write_page(struct nand_device *nand, uint32_t page,
 
        if (!oob) {
                /* no OOB given, so read in the ECC parity from the ECC controller */
-               target_read_u32(target, info->ecc + AT91C_ECCx_PR, &parity);
-               target_read_u32(target, info->ecc + AT91C_ECCx_NPR, &nparity);
+               target_read_u32(target, info->ecc + AT91C_ECCX_PR, &parity);
+               target_read_u32(target, info->ecc + AT91C_ECCX_NPR, &nparity);
 
                oob_data[0] = (uint8_t) parity;
                oob_data[1] = (uint8_t) (parity >> 8);
@@ -478,7 +465,7 @@ static int at91sam9_write_page(struct nand_device *nand, uint32_t page,
        if (!oob)
                free(oob_data);
 
-       if (ERROR_OK != retval) {
+       if (retval != ERROR_OK) {
                LOG_ERROR("Unable to write OOB data to NAND");
                return retval;
        }
@@ -549,14 +536,14 @@ COMMAND_HANDLER(handle_at91sam9_cle_command)
        unsigned num, address_line;
 
        if (CMD_ARGC != 2) {
-               command_print(CMD_CTX, "incorrect number of arguments for 'at91sam9 cle' command");
+               command_print(CMD, "incorrect number of arguments for 'at91sam9 cle' command");
                return ERROR_OK;
        }
 
        COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
        nand = get_nand_device_by_num(num);
        if (!nand) {
-               command_print(CMD_CTX, "invalid nand device number: %s", CMD_ARGV[0]);
+               command_print(CMD, "invalid nand device number: %s", CMD_ARGV[0]);
                return ERROR_OK;
        }
 
@@ -584,7 +571,7 @@ COMMAND_HANDLER(handle_at91sam9_ale_command)
        COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
        nand = get_nand_device_by_num(num);
        if (!nand) {
-               command_print(CMD_CTX, "invalid nand device number: %s", CMD_ARGV[0]);
+               command_print(CMD, "invalid nand device number: %s", CMD_ARGV[0]);
                return ERROR_COMMAND_ARGUMENT_INVALID;
        }
 
@@ -612,7 +599,7 @@ COMMAND_HANDLER(handle_at91sam9_rdy_busy_command)
        COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
        nand = get_nand_device_by_num(num);
        if (!nand) {
-               command_print(CMD_CTX, "invalid nand device number: %s", CMD_ARGV[0]);
+               command_print(CMD, "invalid nand device number: %s", CMD_ARGV[0]);
                return ERROR_COMMAND_ARGUMENT_INVALID;
        }
 
@@ -643,7 +630,7 @@ COMMAND_HANDLER(handle_at91sam9_ce_command)
        COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
        nand = get_nand_device_by_num(num);
        if (!nand) {
-               command_print(CMD_CTX, "invalid nand device number: %s", CMD_ARGV[0]);
+               command_print(CMD, "invalid nand device number: %s", CMD_ARGV[0]);
                return ERROR_COMMAND_ARGUMENT_INVALID;
        }
 
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