NRF51_UICR_BASE = 0x10001000, /* User Information
* Configuration Regsters */
- NRF51_UICR_SIZE = 252,
+ NRF51_UICR_SIZE = 0x100,
#define NRF51_UICR_REG(offset) (NRF51_UICR_BASE + offset)
0x00000001);
}
-static int nrf51_erase_page(struct nrf51_info *chip, struct flash_sector *sector)
+static int nrf51_erase_page(struct flash_bank *bank,
+ struct nrf51_info *chip,
+ struct flash_sector *sector)
{
int res;
if (sector->is_protected)
return ERROR_FAIL;
- if (sector->offset == NRF51_UICR_BASE) {
+ if (bank->base == NRF51_UICR_BASE) {
uint32_t ppfc;
res = target_read_u32(chip->target, NRF51_FICR_PPFC,
&ppfc);
}
if ((ppfc & 0xFF) == 0xFF) {
+ /* We can't erase the UICR. Double-check to
+ see if it's already erased before complaining. */
+ default_flash_blank_check(bank);
+ if (sector->is_erased == 1)
+ return ERROR_OK;
+
LOG_ERROR("The chip was not pre-programmed with SoftDevice stack and UICR cannot be erased separately. Please issue mass erase before trying to write to this region");
return ERROR_FAIL;
};
if (sector->is_protected)
goto error;
- if (!sector->is_erased) {
- res = nrf51_erase_page(chip, sector);
+ if (sector->is_erased != 1) {
+ res = nrf51_erase_page(bank, chip, sector);
if (res != ERROR_OK) {
LOG_ERROR("Failed to erase sector @ 0x%08"PRIx32, sector->offset);
goto error;
/* For each sector to be erased */
for (int s = first; s <= last && res == ERROR_OK; s++)
- res = nrf51_erase_page(chip, &bank->sectors[s]);
+ res = nrf51_erase_page(bank, chip, &bank->sectors[s]);
return res;
}
if (res != ERROR_OK)
return res;
- if (!sector->is_erased) {
- res = nrf51_erase_page(chip, sector);
+ if (sector->is_erased != 1) {
+ res = nrf51_erase_page(bank, chip, sector);
if (res != ERROR_OK)
return res;
}