#define MX_17x_27x 2 /* PIC32mx17x/27x */
struct pic32mx_flash_bank {
- int probed;
+ bool probed;
int dev_type; /* Default 0. 1 for Pic32MX1XX/2XX variant */
};
pic32mx_info = malloc(sizeof(struct pic32mx_flash_bank));
bank->driver_priv = pic32mx_info;
- pic32mx_info->probed = 0;
+ pic32mx_info->probed = false;
pic32mx_info->dev_type = 0;
return ERROR_OK;
uint32_t config0_address;
uint32_t devcfg0;
- int s;
- int num_pages;
+ unsigned int s, num_pages;
if (target->state != TARGET_HALTED) {
LOG_ERROR("Target not halted");
return ERROR_OK;
}
-static int pic32mx_erase(struct flash_bank *bank, int first, int last)
+static int pic32mx_erase(struct flash_bank *bank, unsigned int first,
+ unsigned int last)
{
struct target *target = bank->target;
- int i;
uint32_t status;
if (bank->target->state != TARGET_HALTED) {
return ERROR_OK;
}
- for (i = first; i <= last; i++) {
+ for (unsigned int i = first; i <= last; i++) {
target_write_u32(target, PIC32MX_NVMADDR, Virt2Phys(bank->base + bank->sectors[i].offset));
status = pic32mx_nvm_exec(bank, NVMCON_OP_PAGE_ERASE, 10);
return ERROR_OK;
}
-static int pic32mx_protect(struct flash_bank *bank, int set, int first, int last)
+static int pic32mx_protect(struct flash_bank *bank, int set, unsigned int first,
+ unsigned int last)
{
struct target *target = bank->target;
return ERROR_OK;
}
-/* see contib/loaders/flash/pic32mx.s for src */
+/* see contrib/loaders/flash/pic32mx.s for src */
static uint32_t pic32mx_flash_write_code[] = {
/* write: */
destroy_reg_param(®_params[1]);
destroy_reg_param(®_params[2]);
- if (new_buffer != NULL)
- free(new_buffer);
+ free(new_buffer);
return retval;
}
uint32_t device_id;
int page_size;
- pic32mx_info->probed = 0;
+ pic32mx_info->probed = false;
device_id = ejtag_info->idcode;
LOG_INFO("device id = 0x%08" PRIx32 " (manuf 0x%03x dev 0x%04x, ver 0x%02x)",
}
}
- LOG_INFO("flash size = %" PRId32 "kbytes", num_pages / 1024);
+ LOG_INFO("flash size = %" PRIu32 "kbytes", num_pages / 1024);
- if (bank->sectors) {
- free(bank->sectors);
- bank->sectors = NULL;
- }
+ free(bank->sectors);
/* calculate numbers of pages */
num_pages /= page_size;
bank->sectors[i].is_protected = 1;
}
- pic32mx_info->probed = 1;
+ pic32mx_info->probed = true;
return ERROR_OK;
}
return pic32mx_probe(bank);
}
-static int pic32mx_info(struct flash_bank *bank, char *buf, int buf_size)
+static int pic32mx_info(struct flash_bank *bank, struct command_invocation *cmd)
{
struct target *target = bank->target;
struct mips32_common *mips32 = target->arch_info;
struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
uint32_t device_id;
- int printed = 0, i;
device_id = ejtag_info->idcode;
if (((device_id >> 1) & 0x7ff) != PIC32MX_MANUF_ID) {
- snprintf(buf, buf_size,
- "Cannot identify target as a PIC32MX family (manufacturer 0x%03d != 0x%03d)\n",
- (unsigned)((device_id >> 1) & 0x7ff),
- PIC32MX_MANUF_ID);
+ command_print_sameline(cmd,
+ "Cannot identify target as a PIC32MX family (manufacturer 0x%03x != 0x%03x)\n",
+ (unsigned)((device_id >> 1) & 0x7ff),
+ PIC32MX_MANUF_ID);
return ERROR_FLASH_OPERATION_FAILED;
}
+ int i;
for (i = 0; pic32mx_devs[i].name != NULL; i++) {
if (pic32mx_devs[i].devid == (device_id & 0x0fffffff)) {
- printed = snprintf(buf, buf_size, "PIC32MX%s", pic32mx_devs[i].name);
+ command_print_sameline(cmd, "PIC32MX%s", pic32mx_devs[i].name);
break;
}
}
if (pic32mx_devs[i].name == NULL)
- printed = snprintf(buf, buf_size, "Unknown");
+ command_print_sameline(cmd, "Unknown");
- buf += printed;
- buf_size -= printed;
- snprintf(buf, buf_size, " Ver: 0x%02x",
+ command_print_sameline(cmd, " Ver: 0x%02x",
(unsigned)((device_id >> 28) & 0xf));
return ERROR_OK;
return retval;
if (address < bank->base || address >= (bank->base + bank->size)) {
- command_print(CMD_CTX, "flash address '%s' is out of bounds", CMD_ARGV[0]);
+ command_print(CMD, "flash address '%s' is out of bounds", CMD_ARGV[0]);
return ERROR_OK;
}
res = ERROR_FLASH_OPERATION_FAILED;
if (res == ERROR_OK)
- command_print(CMD_CTX, "pic32mx pgm word complete");
+ command_print(CMD, "pic32mx pgm word complete");
else
- command_print(CMD_CTX, "pic32mx pgm word failed (status = 0x%x)", status);
+ command_print(CMD, "pic32mx pgm word failed (status = 0x%x)", status);
return ERROR_OK;
}
int timeout = 10;
if (CMD_ARGC < 1) {
- command_print(CMD_CTX, "pic32mx unlock <bank>");
+ command_print(CMD, "pic32mx unlock <bank>");
return ERROR_COMMAND_SYNTAX_ERROR;
}
mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
if (mchip_cmd & (1 << 7)) {
/* device is not locked */
- command_print(CMD_CTX, "pic32mx is already unlocked, erasing anyway");
+ command_print(CMD, "pic32mx is already unlocked, erasing anyway");
}
/* unlock/erase device */
mchip_cmd = MCHP_STATUS;
mips_ejtag_drscan_8(ejtag_info, &mchip_cmd);
if (timeout-- == 0) {
- LOG_DEBUG("timeout waiting for unlock: 0x%" PRIx32 "", mchip_cmd);
+ LOG_DEBUG("timeout waiting for unlock: 0x%" PRIx8 "", mchip_cmd);
break;
}
alive_sleep(1);
/* select ejtag tap */
mips_ejtag_set_instr(ejtag_info, MTAP_SW_ETAP);
- command_print(CMD_CTX, "pic32mx unlocked.\n"
+ command_print(CMD, "pic32mx unlocked.\n"
"INFO: a reset or power cycle is required "
"for the new settings to take effect.");