nor/kinetis: add keep-alive during flash write

[openocd.git] / src / flash / nor / stm32l4x.c

diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c
index b6f0d714d8ccc336a30375c7409eb369dcbccb2b..38f8b3b99d85b901e04757db6d49bc92fafb7c07 100644 (file)
--- a/src/flash/nor/stm32l4x.c
+++ b/src/flash/nor/stm32l4x.c
@@ -75,6 +75,12 @@
  * http://www.st.com/resource/en/reference_manual/dm00622834.pdf
  */
 
+/* STM32WLxxx series for reference.
+ *
+ * RM0461 (STM32WLEx)
+ * http://www.st.com/resource/en/reference_manual/dm00530369.pdf
+ */
+
 /*
  * STM32G0xxx series for reference.
  *
@@ -132,7 +138,7 @@ struct stm32l4_flash_bank {
 };
 
 /* human readable list of families this drivers supports */
-static const char *device_families = "STM32L4/L4+/WB/G4/G0";
+static const char *device_families = "STM32L4/L4+/WB/WL/G4/G0";
 
 static const struct stm32l4_rev stm32_415_revs[] = {
        { 0x1000, "1" }, { 0x1001, "2" }, { 0x1003, "3" }, { 0x1007, "4" }
@@ -175,13 +181,21 @@ static const struct stm32l4_rev stm32_470_revs[] = {
 };
 
 static const struct stm32l4_rev stm32_471_revs[] = {
-       { 0x1000, "1" },
+       { 0x1001, "Z" },
 };
 
 static const struct stm32l4_rev stm32_495_revs[] = {
        { 0x2001, "2.1" },
 };
 
+static const struct stm32l4_rev stm32_496_revs[] = {
+       { 0x1000, "A" },
+};
+
+static const struct stm32l4_rev stm32_497_revs[] = {
+       { 0x1000, "1.0" },
+};
+
 static const struct stm32l4_part_info stm32l4_parts[] = {
        {
          .id                    = 0x415,
@@ -303,6 +317,26 @@ static const struct stm32l4_part_info stm32l4_parts[] = {
          .flash_regs_base       = 0x58004000,
          .fsize_addr            = 0x1FFF75E0,
        },
+       {
+         .id                    = 0x496,
+         .revs                  = stm32_496_revs,
+         .num_revs              = ARRAY_SIZE(stm32_496_revs),
+         .device_str            = "STM32WB3x",
+         .max_flash_size_kb     = 512,
+         .has_dual_bank         = false,
+         .flash_regs_base       = 0x58004000,
+         .fsize_addr            = 0x1FFF75E0,
+       },
+       {
+         .id                    = 0x497,
+         .revs                  = stm32_497_revs,
+         .num_revs              = ARRAY_SIZE(stm32_497_revs),
+         .device_str            = "STM32WLEx",
+         .max_flash_size_kb     = 256,
+         .has_dual_bank         = false,
+         .flash_regs_base       = 0x58004000,
+         .fsize_addr            = 0x1FFF75E0,
+       },
 };
 
 /* flash bank stm32l4x <base> <size> 0 0 <target#> */
@@ -637,7 +671,6 @@ static int stm32l4_write_block(struct flash_bank *bank, const uint8_t *buffer,
        uint32_t offset, uint32_t count)
 {
        struct target *target = bank->target;
-       struct stm32l4_flash_bank *stm32l4_info = bank->driver_priv;
        uint32_t buffer_size;
        struct working_area *write_algorithm;
        struct working_area *source;
@@ -693,8 +726,8 @@ static int stm32l4_write_block(struct flash_bank *bank, const uint8_t *buffer,
        buf_set_u32(reg_params[1].value, 0, 32, source->address + source->size);
        buf_set_u32(reg_params[2].value, 0, 32, address);
        buf_set_u32(reg_params[3].value, 0, 32, count);
-       buf_set_u32(reg_params[4].value, 0, 32, stm32l4_info->part_info->flash_regs_base + STM32_FLASH_SR);
-       buf_set_u32(reg_params[5].value, 0, 32, stm32l4_info->part_info->flash_regs_base + STM32_FLASH_CR);
+       buf_set_u32(reg_params[4].value, 0, 32, stm32l4_get_flash_reg(bank, STM32_FLASH_SR));
+       buf_set_u32(reg_params[5].value, 0, 32, stm32l4_get_flash_reg(bank, STM32_FLASH_CR));
 
        retval = target_run_flash_async_algorithm(target, buffer, count, 8,
                        0, NULL,
@@ -918,6 +951,7 @@ static int stm32l4_probe(struct flash_bank *bank)
        case 0x464: /* STM32L41/L42xx */
        case 0x466: /* STM32G03/G04xx */
        case 0x468: /* STM32G43/G44xx */
+       case 0x497: /* STM32WLEx */
                /* single bank flash */
                page_size_kb = 2;
                num_pages = flash_size_kb / page_size_kb;
@@ -964,6 +998,7 @@ static int stm32l4_probe(struct flash_bank *bank)
                }
                break;
        case 0x495: /* STM32WB5x */
+       case 0x496: /* STM32WB3x */
                /* single bank flash */
                page_size_kb = 4;
                num_pages = flash_size_kb / page_size_kb;
@@ -1002,7 +1037,7 @@ static int stm32l4_probe(struct flash_bank *bank)
        /* in dual bank mode number of pages is doubled, but extra bit is bank selection */
        stm32l4_info->wrpxxr_mask = ((max_pages >> (stm32l4_info->dual_bank_mode ? 1 : 0)) - 1);
        assert((stm32l4_info->wrpxxr_mask & 0xFFFF0000) == 0);
-       LOG_DEBUG("WRPxxR mask 0x%04" PRIx16, stm32l4_info->wrpxxr_mask);
+       LOG_DEBUG("WRPxxR mask 0x%04" PRIx16, (uint16_t)stm32l4_info->wrpxxr_mask);
 
        if (bank->sectors) {
                free(bank->sectors);
@@ -1108,7 +1143,7 @@ static int stm32l4_mass_erase(struct flash_bank *bank)
        if (retval != ERROR_OK)
                goto err_lock;
 
-       retval = stm32l4_wait_status_busy(bank,  FLASH_ERASE_TIMEOUT);
+       retval = stm32l4_wait_status_busy(bank, FLASH_ERASE_TIMEOUT);
 
 err_lock:
        retval2 = stm32l4_write_flash_reg(bank, STM32_FLASH_CR, FLASH_LOCK);