zy1000: reset bugfix
[openocd.git] / src / jtag / zy1000 / jtag_minidriver.h
index 536c677061d3d97c92af3d60a25aa056807a3745..1dcf23a98af6cacb297bd8f3d6b37b7f767c2fd7 100644 (file)
@@ -32,33 +32,9 @@ int  diag_printf(const char *fmt, ...);
 #define ZY1000_PEEK(a, b) HAL_READ_UINT32(a, b); diag_printf("peek 0x%08x = 0x%08x\n", a, b)
 #else
 #define ZY1000_PEEK(a, b) HAL_READ_UINT32(a, b)
-
-#ifdef CYGPKG_HAL_NIOS2
-#define ZY1000_POKE(a, b) \
-                {/* This will flush the bridge FIFO. Overflowed bridge FIFO fails. We must \
-                flush every "often". No precise system has been found, but 4 seems solid. \
-                 This code goes away once the FPGA has been fixed. */ \
-\
-CYG_INTERRUPT_STATE _old_; \
-HAL_DISABLE_INTERRUPTS(_old_); \
-HAL_WRITE_UINT32(a, b);\
- static int overflow_counter = 0; \
-   if (++overflow_counter >= 1) \
-   { \
-          /* clear FIFO */ \
-          cyg_uint32 empty; ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, empty); \
-          overflow_counter = 0; \
-   } \
-   /* NB! interrupts must be restored *after* read */ \
-   HAL_RESTORE_INTERRUPTS(_old_); \
-}\
-
-#else
 #define ZY1000_POKE(a, b) HAL_WRITE_UINT32(a, b)
 #endif
 
-#endif
-
 // FIFO empty?
 static __inline__ void waitIdle(void)
 {
@@ -74,7 +50,7 @@ static __inline__ void waitQueue(void)
 //     waitIdle();
 }
 
-static void sampleShiftRegister(void)
+static __inline__ void sampleShiftRegister(void)
 {
 #if 0
        cyg_uint32 dummy;
@@ -83,8 +59,7 @@ static void sampleShiftRegister(void)
 #endif
 }
 
-/* -O3 will inline this for us */
-static void setCurrentState(enum tap_state state)
+static __inline__ void setCurrentState(enum tap_state state)
 {
        cyg_uint32 a;
        a = state;

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