uint8_t instr, uint8_t reg_addr, uint8_t RnW,
uint8_t *outvalue, uint8_t *invalue, uint8_t *ack)
{
- struct arm_jtag *jtag_info = dap->jtag_info;
+ struct jtag_tap *tap = dap->tap;
struct scan_field fields[2];
uint8_t out_addr_buf;
int retval;
- retval = arm_jtag_set_instr(jtag_info, instr, NULL, TAP_IDLE);
+ retval = arm_jtag_set_instr(tap, instr, NULL, TAP_IDLE);
if (retval != ERROR_OK)
return retval;
fields[1].out_value = outvalue;
fields[1].in_value = invalue;
- jtag_add_dr_scan(jtag_info->tap, 2, fields, TAP_IDLE);
+ jtag_add_dr_scan(tap, 2, fields, TAP_IDLE);
/* Add specified number of tck clocks after starting memory bus
* access, giving the hardware time to complete the access.
if ((instr == JTAG_DP_APACC)
&& ((reg_addr == MEM_AP_REG_DRW)
|| ((reg_addr & 0xF0) == MEM_AP_REG_BD0))
- && (dap->memaccess_tck != 0))
- jtag_add_runtest(dap->memaccess_tck,
+ && (dap->ap[dap_ap_get_select(dap)].memaccess_tck != 0))
+ jtag_add_runtest(dap->ap[dap_ap_get_select(dap)].memaccess_tck,
TAP_IDLE);
return ERROR_OK;
* MEM-AP access; but not if autoincrementing.
* *Real* CSW and TAR values are always shown.
*/
- if (dap->ap_tar_value != (uint32_t) -1)
+ if (dap->ap[dap_ap_get_select(dap)].tar_value != (uint32_t) -1)
LOG_DEBUG("MEM-AP Cached values: "
"ap_bank 0x%" PRIx32
", ap_csw 0x%" PRIx32
", ap_tar 0x%" PRIx32,
dap->ap_bank_value,
- dap->ap_csw_value,
- dap->ap_tar_value);
+ dap->ap[dap_ap_get_select(dap)].csw_value,
+ dap->ap[dap_ap_get_select(dap)].tar_value);
if (ctrlstat & SSTICKYORUN)
LOG_ERROR("JTAG-DP OVERRUN - check clock, "