* on for example ARM7TDMI cores.
* - ARM_CORE_TYPE_SEC_EXT indicates core has security extensions, thus
* three more registers are shadowed for "Secure Monitor" mode.
+ * - ARM_CORE_TYPE_VIRT_EXT indicates core has virtualization extensions
+ * and also security extensions. Additional shadowed registers for
+ * "Secure Monitor" and "Hypervisor" modes.
* - ARM_CORE_TYPE_M_PROFILE indicates a microcontroller profile core,
* which only shadows SP.
*/
enum arm_core_type {
ARM_CORE_TYPE_STD = -1,
ARM_CORE_TYPE_SEC_EXT = 1,
+ ARM_CORE_TYPE_VIRT_EXT,
ARM_CORE_TYPE_M_PROFILE,
};
+/** ARM Architecture specifying the version and the profile */
+enum arm_arch {
+ ARM_ARCH_UNKNOWN,
+ ARM_ARCH_V4,
+ ARM_ARCH_V6M,
+ ARM_ARCH_V7M,
+ ARM_ARCH_V8M,
+};
+
/**
* Represent state of an ARM core.
*
ARM_MODE_SVC = 19,
ARM_MODE_MON = 22,
ARM_MODE_ABT = 23,
+ ARM_MODE_HYP = 26,
ARM_MODE_UND = 27,
ARM_MODE_1176_MON = 28,
ARM_MODE_SYS = 31,
/** Record the current core state: ARM, Thumb, or otherwise. */
enum arm_state core_state;
- /** Flag reporting unavailability of the BKPT instruction. */
- bool is_armv4;
-
- /** Flag reporting armv6m based core. */
- bool is_armv6m;
+ /** ARM architecture version */
+ enum arm_arch arch;
/** Floating point or VFP version, 0 if disabled. */
int arm_vfp_version;
/** Read coprocessor register. */
int (*mrc)(struct target *target, int cpnum,
uint32_t op1, uint32_t op2,
- uint32_t CRn, uint32_t CRm,
+ uint32_t crn, uint32_t crm,
uint32_t *value);
/** Write coprocessor register. */
int (*mcr)(struct target *target, int cpnum,
uint32_t op1, uint32_t op2,
- uint32_t CRn, uint32_t CRm,
+ uint32_t crn, uint32_t crm,
uint32_t value);
void *arch_info;
/** Convert target handle to generic ARM target state handle. */
static inline struct arm *target_to_arm(struct target *target)
{
- assert(target != NULL);
+ assert(target);
return target->arch_info;
}
static inline bool is_arm(struct arm *arm)
{
- assert(arm != NULL);
+ assert(arm);
return arm->common_magic == ARM_COMMON_MAGIC;
}
};
struct reg_cache *arm_build_reg_cache(struct target *target, struct arm *arm);
+void arm_free_reg_cache(struct arm *arm);
+
struct reg_cache *armv8_build_reg_cache(struct target *target);
extern const struct command_registration arm_command_handlers[];