- armv7m control register now set as dirty when switching context

[openocd.git] / src / target / arm11_dbgtap.c

diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c
index bb4695e03f7f917e3622362508cec0cd3d6ee694..fa17ac7e33ed37a2bff86ff1010859f96478cb89 100644 (file)
--- a/src/target/arm11_dbgtap.c
+++ b/src/target/arm11_dbgtap.c
@@ -45,7 +45,8 @@ int arm11_add_ir_scan_vc(int num_fields, scan_field_t *fields, enum tap_state st
     if (cmd_queue_cur_state == TAP_PI)
        jtag_add_pathmove(asizeof(arm11_move_pi_to_si_via_ci), arm11_move_pi_to_si_via_ci);
 
-    return jtag_add_ir_scan(num_fields, fields, state);
+    jtag_add_ir_scan(num_fields, fields, state);
+    return ERROR_OK;
 }
 
 enum tap_state arm11_move_pd_to_sd_via_cd[] =
@@ -58,7 +59,8 @@ int arm11_add_dr_scan_vc(int num_fields, scan_field_t *fields, enum tap_state st
     if (cmd_queue_cur_state == TAP_PD)
        jtag_add_pathmove(asizeof(arm11_move_pd_to_sd_via_cd), arm11_move_pd_to_sd_via_cd);
 
-    return jtag_add_dr_scan(num_fields, fields, state);
+    jtag_add_dr_scan(num_fields, fields, state);
+    return ERROR_OK;
 }
 
 
@@ -274,14 +276,32 @@ enum target_debug_reason arm11_get_DSCR_debug_reason(u32 dscr)
 {
     switch (dscr & ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_MASK)
     {
-    case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_HALT:                        return DBG_REASON_DBGRQ;
-    case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_BREAKPOINT:          return DBG_REASON_BREAKPOINT;
-    case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_WATCHPOINT:          return DBG_REASON_WATCHPOINT;
-    case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_BKPT_INSTRUCTION:    return DBG_REASON_BREAKPOINT;
-    case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_EDBGRQ:              return DBG_REASON_DBGRQ;
-    case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_VECTOR_CATCH:                return DBG_REASON_BREAKPOINT;
+    case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_HALT:
+       INFO("Debug entry: JTAG HALT");
+       return DBG_REASON_DBGRQ;
+
+    case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_BREAKPOINT:
+       INFO("Debug entry: breakpoint");
+       return DBG_REASON_BREAKPOINT;
+
+    case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_WATCHPOINT:
+       INFO("Debug entry: watchpoint");
+       return DBG_REASON_WATCHPOINT;
+
+    case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_BKPT_INSTRUCTION:
+       INFO("Debug entry: BKPT instruction");
+       return DBG_REASON_BREAKPOINT;
+
+    case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_EDBGRQ:
+       INFO("Debug entry: EDBGRQ signal");
+       return DBG_REASON_DBGRQ;
+
+    case ARM11_DSCR_METHOD_OF_DEBUG_ENTRY_VECTOR_CATCH:
+       INFO("Debug entry: VCR vector catch");
+       return DBG_REASON_BREAKPOINT;
 
     default:
+       INFO("Debug entry: unknown");
        return DBG_REASON_DBGRQ;
     }
 };
@@ -752,7 +772,7 @@ void arm11_sc7_set_vcr(arm11_common_t * arm11, u32 value)
 {
     arm11_sc7_action_t         set_vcr;
 
-    set_vcr.write              = 0;
+    set_vcr.write              = true;
     set_vcr.address            = ARM11_SC7_VCR;
     set_vcr.value              = value;