- added patch by Øyvind Harboe to Intel Hex Start Segment Address Record (Type 3)

[openocd.git] / src / target / arm720t.c

diff --git a/src/target/arm720t.c b/src/target/arm720t.c
index a3c40d6f6a60bd181b6ae7c087b54f2d8cb28243..05cc30f4cecccbce0827a72794b60ecf276e6cd5 100644 (file)
--- a/src/target/arm720t.c
+++ b/src/target/arm720t.c
@@ -70,7 +70,8 @@ target_type_t arm720t_target =
        .read_memory = arm720t_read_memory,
        .write_memory = arm720t_write_memory,
        .bulk_write_memory = arm7_9_bulk_write_memory,
-
+       .checksum_memory = arm7_9_checksum_memory,
+       
        .run_algorithm = armv4_5_run_algorithm,
 
        .add_breakpoint = arm7_9_add_breakpoint,
@@ -241,8 +242,8 @@ void arm720t_post_debug_entry(target_t *target)
        arm720t->armv4_5_mmu.armv4_5_cache.i_cache_enabled = 0;
 
        /* save i/d fault status and address register */
-       arm720t_read_cp15(target, 0xee150f10, &arm720t->fsr);
-       arm720t_read_cp15(target, 0xee160f10, &arm720t->far);
+       arm720t_read_cp15(target, 0xee150f10, &arm720t->fsr_reg);
+       arm720t_read_cp15(target, 0xee160f10, &arm720t->far_reg);
        jtag_execute_queue();
 }
 
@@ -254,8 +255,8 @@ void arm720t_pre_restore_context(target_t *target)
        arm720t_common_t *arm720t = arm7tdmi->arch_info;
        
        /* restore i/d fault status and address register */
-       arm720t_write_cp15(target, 0xee050f10, arm720t->fsr);
-       arm720t_write_cp15(target, 0xee060f10, arm720t->far);
+       arm720t_write_cp15(target, 0xee050f10, arm720t->fsr_reg);
+       arm720t_write_cp15(target, 0xee060f10, arm720t->far_reg);
 }
 
 int arm720t_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p, arm7tdmi_common_t **arm7tdmi_p, arm720t_common_t **arm720t_p)