ARM11: use shared DSCR bit names

[openocd.git] / src / target / arm7_9_common.c

diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index b40be8d4dca87d516fe6019dae03997025ee9b2e..255a85f57f8207e3406e3cf68d3eb4549af71531 100644 (file)
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -34,7 +34,7 @@
 #include "embeddedice.h"
 #include "target_request.h"
 #include "etm.h"
-#include "time_support.h"
+#include <helper/time_support.h>
 #include "arm_simulator.h"
 #include "algorithm.h"
 #include "register.h"
@@ -426,12 +426,6 @@ int arm7_9_add_breakpoint(struct target *target, struct breakpoint *breakpoint)
 {
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
-       if (target->state != TARGET_HALTED)
-       {
-               LOG_WARNING("target not halted");
-               return ERROR_TARGET_NOT_HALTED;
-       }
-
        if (arm7_9->breakpoint_count == 0)
        {
                /* make sure we don't have any dangling breakpoints. This is vital upon
@@ -631,12 +625,6 @@ int arm7_9_add_watchpoint(struct target *target, struct watchpoint *watchpoint)
 {
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
-       if (target->state != TARGET_HALTED)
-       {
-               LOG_WARNING("target not halted");
-               return ERROR_TARGET_NOT_HALTED;
-       }
-
        if (arm7_9->wp_available < 1)
        {
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
@@ -2659,7 +2647,13 @@ static const uint32_t dcc_code[] =
        0xeafffff9      /*    b   w                   */
 };
 
-int armv4_5_run_algorithm_inner(struct target *target, int num_mem_params, struct mem_param *mem_params, int num_reg_params, struct reg_param *reg_params, uint32_t entry_point, uint32_t exit_point, int timeout_ms, void *arch_info, int (*run_it)(struct target *target, uint32_t exit_point, int timeout_ms, void *arch_info));
+extern int armv4_5_run_algorithm_inner(struct target *target,
+       int num_mem_params, struct mem_param *mem_params,
+       int num_reg_params, struct reg_param *reg_params,
+       uint32_t entry_point, uint32_t exit_point,
+       int timeout_ms, void *arch_info,
+       int (*run_it)(struct target *target, uint32_t exit_point,
+                       int timeout_ms, void *arch_info));
 
 int arm7_9_bulk_write_memory(struct target *target, uint32_t address, uint32_t count, uint8_t *buffer)
 {
@@ -2709,7 +2703,9 @@ int arm7_9_bulk_write_memory(struct target *target, uint32_t address, uint32_t c
        dcc_count = count;
        dcc_buffer = buffer;
        retval = armv4_5_run_algorithm_inner(target, 0, NULL, 1, reg_params,
-                       arm7_9->dcc_working_area->address, arm7_9->dcc_working_area->address + 6*4, 20*1000, &armv4_5_info, arm7_9_dcc_completion);
+                       arm7_9->dcc_working_area->address,
+                               arm7_9->dcc_working_area->address + 6*4,
+                       20*1000, &armv4_5_info, arm7_9_dcc_completion);
 
        if (retval == ERROR_OK)
        {
@@ -2873,7 +2869,13 @@ static const struct command_registration arm7_9_any_command_handlers[] = {
        },
        COMMAND_REGISTRATION_DONE
 };
-static const struct command_registration arm7_9_command_handlers[] = {
+const struct command_registration arm7_9_command_handlers[] = {
+       {
+               .chain = arm_command_handlers,
+       },
+       {
+               .chain = etm_command_handlers,
+       },
        {
                .name = "arm7_9",
                .mode = COMMAND_ANY,
@@ -2882,10 +2884,3 @@ static const struct command_registration arm7_9_command_handlers[] = {
        },
        COMMAND_REGISTRATION_DONE
 };
-
-int arm7_9_register_commands(struct command_context *cmd_ctx)
-{
-       armv4_5_register_commands(cmd_ctx);
-       etm_register_commands(cmd_ctx);
-       return register_commands(cmd_ctx, NULL, arm7_9_command_handlers);
-}