- reworked image handling to support multiple sections (tested with ihex file contain...

[openocd.git] / src / target / arm7_9_common.h

diff --git a/src/target/arm7_9_common.h b/src/target/arm7_9_common.h
index f03ae49638aeabfb0ecb112861cda7126c5ff60d..fbcb920dc51ae162bf88be00c5f25c97effaf512 100644 (file)
--- a/src/target/arm7_9_common.h
+++ b/src/target/arm7_9_common.h
@@ -25,6 +25,8 @@
 #include "breakpoints.h"
 #include "target.h"
 
+#include "etm.h"
+
 #define        ARM7_9_COMMON_MAGIC 0x0a790a79
 
 typedef struct arm7_9_common_s
@@ -33,7 +35,6 @@ typedef struct arm7_9_common_s
        
        arm_jtag_t jtag_info;
        reg_cache_t *eice_cache;
-       reg_cache_t *etm_cache;
        
        u32 arm_bkpt;
        u16 thumb_bkpt;
@@ -45,20 +46,27 @@ typedef struct arm7_9_common_s
        int force_hw_bkpts;
        int dbgreq_adjust_pc;
        int use_dbgrq;
-       int has_etm;
+       
+       etm_context_t *etm_ctx;
+       
+       int has_single_step;
+       int has_monitor_mode;
+       int has_vector_catch;
        
        int reinit_embeddedice;
+       int debug_entry_from_reset;
        
        struct working_area_s *dcc_working_area;
        
-       int fast_memory_writes;
+       int fast_memory_access;
        int dcc_downloads;
 
        int (*examine_debug_reason)(target_t *target);
        
        void (*change_to_arm)(target_t *target, u32 *r0, u32 *pc);
        
-       void (*read_core_regs)(target_t *target, u32 mask, u32* core_regs[16]);
+       void (*read_core_regs)(target_t *target, u32 mask, u32 *core_regs[16]);
+       void (*read_core_regs_target_buffer)(target_t *target, u32 mask, void *buffer, int size);
        void (*read_xpsr)(target_t *target, u32 *xpsr, int spsr);
        
        void (*write_xpsr)(target_t *target, u32 xpsr, int spsr);
@@ -100,6 +108,7 @@ int arm7_9_deassert_reset(target_t *target);
 int arm7_9_reset_request_halt(target_t *target);
 int arm7_9_early_halt(target_t *target);
 int arm7_9_soft_reset_halt(struct target_s *target);
+int arm7_9_prepare_reset_halt(struct target_s *target);
 
 int arm7_9_halt(target_t *target);
 int arm7_9_debug_entry(target_t *target);
@@ -113,9 +122,9 @@ int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffe
 
 int arm7_9_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t *mem_params, int num_reg_prams, reg_param_t *reg_param, u32 entry_point, void *arch_info);
 
-int arm7_9_add_breakpoint(struct target_s *target, u32 address, u32 length, enum breakpoint_type type);
+int arm7_9_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
 int arm7_9_remove_breakpoint(struct target_s *target, breakpoint_t *breakpoint);
-int arm7_9_add_watchpoint(struct target_s *target, u32 address, u32 length, enum watchpoint_rw rw);
+int arm7_9_add_watchpoint(struct target_s *target, watchpoint_t *watchpoint);
 int arm7_9_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint);
 
 void arm7_9_enable_eice_step(target_t *target);
@@ -124,6 +133,7 @@ void arm7_9_disable_eice_step(target_t *target);
 int arm7_9_execute_sys_speed(struct target_s *target);
 
 int arm7_9_init_arch_info(target_t *target, arm7_9_common_t *arm7_9);
+int arm7_9_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, arm7_9_common_t **arm7_9_p);
 
 
 #endif /* ARM7_9_COMMON_H */