* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
- * Copyright (C) 2007,2008 Øyvind Harboe *
+ * Copyright (C) 2007,2008 Øyvind Harboe *
* oyvind.harboe@zylin.com *
* *
* This program is free software; you can redistribute it and/or modify *
fields[1].out_value = NULL;
fields[1].in_value = databus;
- if((retval = arm_jtag_scann(&arm7_9->jtag_info, 0x1)) != ERROR_OK)
+ if ((retval = arm_jtag_scann(&arm7_9->jtag_info, 0x1)) != ERROR_OK)
{
return retval;
}
arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL);
jtag_add_dr_scan(2, fields, jtag_set_end_state(TAP_DRPAUSE));
- if((retval = jtag_execute_queue()) != ERROR_OK)
+ if ((retval = jtag_execute_queue()) != ERROR_OK)
{
return retval;
}
scan_field_t fields[2];
jtag_set_end_state(TAP_DRPAUSE);
- if((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
+ if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
{
return retval;
}
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
- if((retval = jtag_execute_queue()) != ERROR_OK)
+ if ((retval = jtag_execute_queue()) != ERROR_OK)
{
return retval;
}
void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip)
{
- uint32_t readback=le_to_h_u32(tmp);
+ uint32_t readback = le_to_h_u32(tmp);
if (flip)
- readback=flip_u32(readback, 32);
+ readback = flip_u32(readback, 32);
switch (size)
{
case 4:
static int arm7endianness(jtag_callback_data_t arg, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
{
- uint8_t *in=(uint8_t *)arg;
+ uint8_t *in = (uint8_t *)arg;
arm_endianness((uint8_t *)captured, in, (int)size, (int)be, 1);
return ERROR_OK;
}
/* clock the target, and read the databus
* the *in pointer points to a buffer where elements of 'size' bytes
- * are stored in big (be==1) or little (be==0) endianness
+ * are stored in big (be == 1) or little (be == 0) endianness
*/
int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, int be)
{
scan_field_t fields[2];
jtag_set_end_state(TAP_DRPAUSE);
- if((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
+ if ((retval = arm_jtag_scann(jtag_info, 0x1)) != ERROR_OK)
{
return retval;
}
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
- if((retval = jtag_execute_queue()) != ERROR_OK)
+ if ((retval = jtag_execute_queue()) != ERROR_OK)
{
return retval;
}
for (i = 0; i <= 15; i++)
{
if (mask & (1 << i))
- /* nothing fetched, STM still in EXECUTE (1+i cycle) */
+ /* nothing fetched, STM still in EXECUTE (1 + i cycle) */
arm7tdmi_clock_data_in(jtag_info, core_regs[i]);
}
}
for (i = 0; i <= 15; i++)
{
- /* nothing fetched, STM still in EXECUTE (1+i cycle), read databus */
+ /* nothing fetched, STM still in EXECUTE (1 + i cycle), read databus */
if (mask & (1 << i))
{
switch (size)
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
- LOG_DEBUG("xpsr: %8.8x, spsr: %i", xpsr, spsr);
+ LOG_DEBUG("xpsr: %8.8" PRIx32 ", spsr: %i", xpsr, spsr);
/* MSR1 fetched */
arm7tdmi_clock_out(jtag_info, ARMV4_5_MSR_IM(xpsr & 0xff, 0, 1, spsr), NULL, 0);
for (i = 0; i <= 15; i++)
{
if (mask & (1 << i))
- /* nothing fetched, LDM still in EXECUTE (1+i cycle) */
+ /* nothing fetched, LDM still in EXECUTE (1 + i cycle) */
arm7tdmi_clock_out_inner(jtag_info, core_regs[i], 0);
}
arm7tdmi_clock_out_inner(jtag_info, ARMV4_5_NOP, 0);
{
/* get pointers to arch-specific information */
reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
- reg_cache_t *t=embeddedice_build_reg_cache(target, arm7_9);
- if (t==NULL)
+ reg_cache_t *t = embeddedice_build_reg_cache(target, arm7_9);
+ if (t == NULL)
return ERROR_FAIL;
(*cache_p) = t;
}
target_set_examined(target);
}
- if ((retval=embeddedice_setup(target))!=ERROR_OK)
+ if ((retval = embeddedice_setup(target)) != ERROR_OK)
return retval;
- if ((retval=arm7_9_setup(target))!=ERROR_OK)
+ if ((retval = arm7_9_setup(target)) != ERROR_OK)
return retval;
if (arm7_9->etm_ctx)
{
- if ((retval=etm_setup(target))!=ERROR_OK)
+ if ((retval = etm_setup(target)) != ERROR_OK)
return retval;
}
return ERROR_OK;
return ERROR_OK;
}
-int arm7tdmi_target_create( struct target_s *target, Jim_Interp *interp )
+int arm7tdmi_target_create(struct target_s *target, Jim_Interp *interp)
{
arm7tdmi_common_t *arm7tdmi;
arm7tdmi = calloc(1,sizeof(arm7tdmi_common_t));
arm7tdmi_init_arch_info(target, arm7tdmi, target->tap);
+ arm7tdmi->arm7_9_common.armv4_5_common.is_armv4 = true;
return ERROR_OK;
}