target/riscv: add common magic
[openocd.git] / src / target / arm946e.c
index 33da4a4f387a24e9d9434ebf3337bf2717cbdc16..d2bccad22833c5d2934f09819d0b222590707c0f 100644 (file)
@@ -1,3 +1,5 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
 /***************************************************************************
  *   Copyright (C) 2005 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
@@ -7,19 +9,6 @@
  *                                                                         *
  *   Copyright (C) 2010 by Drasko DRASKOVIC                                *
  *   drasko.draskovic@gmail.com                                            *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
 #ifdef HAVE_CONFIG_H
@@ -51,8 +40,8 @@
  */
 static uint8_t arm946e_preserve_cache;
 
-int arm946e_post_debug_entry(struct target *target);
-void arm946e_pre_restore_context(struct target *target);
+static int arm946e_post_debug_entry(struct target *target);
+static void arm946e_pre_restore_context(struct target *target);
 static int arm946e_read_cp15(struct target *target, int reg_addr, uint32_t *value);
 
 int arm946e_init_arch_info(struct target *target,
@@ -250,7 +239,7 @@ static uint32_t arm946e_cp15_get_csize(struct target *target, int idsel)
        return csize ? 1 << (12 + (csize-3)) : 0;
 }
 
-uint32_t arm946e_invalidate_whole_dcache(struct target *target)
+static uint32_t arm946e_invalidate_whole_dcache(struct target *target)
 {
        uint32_t csize = arm946e_cp15_get_csize(target, GET_DCACHE_SIZE);
        if (csize == 0)
@@ -306,7 +295,7 @@ uint32_t arm946e_invalidate_whole_dcache(struct target *target)
        return ERROR_OK;
 }
 
-uint32_t arm946e_invalidate_whole_icache(struct target *target)
+static uint32_t arm946e_invalidate_whole_icache(struct target *target)
 {
        /* Check cache presence before flushing - avoid undefined behavior */
        uint32_t csize = arm946e_cp15_get_csize(target, GET_ICACHE_SIZE);
@@ -327,7 +316,7 @@ uint32_t arm946e_invalidate_whole_icache(struct target *target)
        return ERROR_OK;
 }
 
-int arm946e_post_debug_entry(struct target *target)
+static int arm946e_post_debug_entry(struct target *target)
 {
        uint32_t ctr_reg = 0x0;
        uint32_t retval = ERROR_OK;
@@ -368,7 +357,7 @@ int arm946e_post_debug_entry(struct target *target)
        return ERROR_OK;
 }
 
-void arm946e_pre_restore_context(struct target *target)
+static void arm946e_pre_restore_context(struct target *target)
 {
        uint32_t ctr_reg = 0x0;
        uint32_t retval;
@@ -393,7 +382,7 @@ void arm946e_pre_restore_context(struct target *target)
        }       /* if preserve_cache */
 }
 
-uint32_t arm946e_invalidate_dcache(struct target *target, uint32_t address,
+static uint32_t arm946e_invalidate_dcache(struct target *target, uint32_t address,
        uint32_t size, uint32_t count)
 {
        uint32_t cur_addr = 0x0;
@@ -458,7 +447,7 @@ uint32_t arm946e_invalidate_dcache(struct target *target, uint32_t address,
        return ERROR_OK;
 }
 
-uint32_t arm946e_invalidate_icache(struct target *target, uint32_t address,
+static uint32_t arm946e_invalidate_icache(struct target *target, uint32_t address,
        uint32_t size, uint32_t count)
 {
        uint32_t cur_addr = 0x0;
@@ -509,7 +498,7 @@ uint32_t arm946e_invalidate_icache(struct target *target, uint32_t address,
 }
 
 /** Writes a buffer, in the specified word size, with current MMU settings. */
-int arm946e_write_memory(struct target *target, target_addr_t address,
+static int arm946e_write_memory(struct target *target, target_addr_t address,
        uint32_t size, uint32_t count, const uint8_t *buffer)
 {
        int retval;
@@ -557,7 +546,7 @@ int arm946e_write_memory(struct target *target, target_addr_t address,
 
 }
 
-int arm946e_read_memory(struct target *target, target_addr_t address,
+static int arm946e_read_memory(struct target *target, target_addr_t address,
        uint32_t size, uint32_t count, uint8_t *buffer)
 {
        int retval;
@@ -596,7 +585,7 @@ COMMAND_HANDLER(arm946e_handle_cp15)
                uint32_t value;
                retval = arm946e_read_cp15(target, address, &value);
                if (retval != ERROR_OK) {
-                       command_print(CMD, "%s cp15 reg %" PRIi32 " access failed", target_name(target), address);
+                       command_print(CMD, "%s cp15 reg %" PRIu32 " access failed", target_name(target), address);
                        return retval;
                }
                retval = jtag_execute_queue();
@@ -611,7 +600,7 @@ COMMAND_HANDLER(arm946e_handle_cp15)
 
                retval = arm946e_write_cp15(target, address, value);
                if (retval != ERROR_OK) {
-                       command_print(CMD, "%s cp15 reg %" PRIi32 " access failed", target_name(target), address);
+                       command_print(CMD, "%s cp15 reg %" PRIu32 " access failed", target_name(target), address);
                        return retval;
                }
                if (address == CP15_CTL)

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