#define _DEBUG_INSTRUCTION_EXECUTION_
#endif
-int arm966e_init_arch_info(target_t *target, struct arm966e_common *arm966e, struct jtag_tap *tap)
+int arm966e_init_arch_info(struct target *target, struct arm966e_common *arm966e, struct jtag_tap *tap)
{
struct arm9tdmi_common *arm9tdmi = &arm966e->arm9tdmi_common;
struct arm7_9_common *arm7_9 = &arm9tdmi->arm7_9_common;
return ERROR_OK;
}
-static int arm966e_target_create(struct target_s *target, Jim_Interp *interp)
+static int arm966e_target_create(struct target *target, Jim_Interp *interp)
{
struct arm966e_common *arm966e = calloc(1,sizeof(struct arm966e_common));
return arm966e_init_arch_info(target, arm966e, target->tap);
}
-static int arm966e_verify_pointer(struct command_context_s *cmd_ctx,
+static int arm966e_verify_pointer(struct command_context *cmd_ctx,
struct arm966e_common *arm966e)
{
if (arm966e->common_magic != ARM966E_COMMON_MAGIC) {
return ERROR_OK;
}
-static int arm966e_read_cp15(target_t *target, int reg_addr, uint32_t *value)
+static int arm966e_read_cp15(struct target *target, int reg_addr, uint32_t *value)
{
int retval = ERROR_OK;
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
}
// EXPORTED to str9x (flash)
-int arm966e_write_cp15(target_t *target, int reg_addr, uint32_t value)
+int arm966e_write_cp15(struct target *target, int reg_addr, uint32_t value)
{
int retval = ERROR_OK;
struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
COMMAND_HANDLER(arm966e_handle_cp15_command)
{
int retval;
- target_t *target = get_current_target(cmd_ctx);
+ struct target *target = get_current_target(cmd_ctx);
struct arm966e_common *arm966e = target_to_arm966(target);
retval = arm966e_verify_pointer(cmd_ctx, arm966e);
uint32_t value;
if ((retval = arm966e_read_cp15(target, address, &value)) != ERROR_OK)
{
- command_print(cmd_ctx, "couldn't access reg %i", address);
+ command_print(cmd_ctx,
+ "couldn't access reg %" PRIi32,
+ address);
return ERROR_OK;
}
if ((retval = jtag_execute_queue()) != ERROR_OK)
return retval;
}
- command_print(cmd_ctx, "%i: %8.8" PRIx32 "", address, value);
+ command_print(cmd_ctx, "%" PRIi32 ": %8.8" PRIx32,
+ address, value);
}
else if (argc == 2)
{
COMMAND_PARSE_NUMBER(u32, args[1], value);
if ((retval = arm966e_write_cp15(target, address, value)) != ERROR_OK)
{
- command_print(cmd_ctx, "couldn't access reg %i", address);
+ command_print(cmd_ctx,
+ "couldn't access reg %" PRIi32,
+ address);
return ERROR_OK;
}
- command_print(cmd_ctx, "%i: %8.8" PRIx32 "", address, value);
+ command_print(cmd_ctx, "%" PRIi32 ": %8.8" PRIx32,
+ address, value);
}
}
}
/** Registers commands used to access coprocessor resources. */
-int arm966e_register_commands(struct command_context_s *cmd_ctx)
+int arm966e_register_commands(struct command_context *cmd_ctx)
{
int retval;
- command_t *arm966e_cmd;
+ struct command *arm966e_cmd;
retval = arm9tdmi_register_commands(cmd_ctx);
arm966e_cmd = register_command(cmd_ctx, NULL, "arm966e",
.read_memory = arm7_9_read_memory,
.write_memory = arm7_9_write_memory,
.bulk_write_memory = arm7_9_bulk_write_memory,
- .checksum_memory = arm7_9_checksum_memory,
- .blank_check_memory = arm7_9_blank_check_memory,
+
+ .checksum_memory = arm_checksum_memory,
+ .blank_check_memory = arm_blank_check_memory,
.run_algorithm = armv4_5_run_algorithm,
.register_commands = arm966e_register_commands,
.target_create = arm966e_target_create,
.init_target = arm9tdmi_init_target,
- .examine = arm9tdmi_examine,
+ .examine = arm7_9_examine,
};