Andreas Fritiofson <andreas.fritiofson@gmail.com> UTF8 fixes

[openocd.git] / src / target / arm9tdmi.c

diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c
index 922fb085936a7d308ea8c411a5112b1297548a30..6e5a96056ddfe59c8cea430a0e1f5789b8ba0fa8 100644 (file)
--- a/src/target/arm9tdmi.c
+++ b/src/target/arm9tdmi.c
@@ -39,7 +39,7 @@
 int handle_arm9tdmi_catch_vectors_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 
 /* forward declarations */
-int arm9tdmi_target_create( struct target_s *target, Jim_Interp *interp );
+int arm9tdmi_target_create(struct target_s *target, Jim_Interp *interp);
 
 int arm9tdmi_quit(void);
 
@@ -203,7 +203,7 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, uint32_t instr, uint32_t out, uint
 
        if (in)
        {
-               fields[0].in_value=(uint8_t *)in;
+               fields[0].in_value = (uint8_t *)in;
                jtag_add_dr_scan(3, fields, jtag_get_end_state());
 
                jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)in);
@@ -294,14 +294,14 @@ extern void arm_endianness(uint8_t *tmp, void *in, int size, int be, int flip);
 
 static int arm9endianness(jtag_callback_data_t arg, jtag_callback_data_t size, jtag_callback_data_t be, jtag_callback_data_t captured)
 {
-  uint8_t *in=(uint8_t *)arg;
+  uint8_t *in = (uint8_t *)arg;
        arm_endianness((uint8_t *)captured, in, (int)size, (int)be, 0);
        return ERROR_OK;
 }
 
 /* clock the target, and read the databus
  * the *in pointer points to a buffer where elements of 'size' bytes
- * are stored in big (be==1) or little (be==0) endianness
+ * are stored in big (be == 1) or little (be == 0) endianness
  */
 int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, int be)
 {
@@ -511,7 +511,7 @@ void arm9tdmi_write_xpsr(target_t *target, uint32_t xpsr, int spsr)
        arm7_9_common_t *arm7_9 = armv4_5->arch_info;
        arm_jtag_t *jtag_info = &arm7_9->jtag_info;
 
-       LOG_DEBUG("xpsr: %8.8x, spsr: %i", xpsr, spsr);
+       LOG_DEBUG("xpsr: %8.8" PRIx32 ", spsr: %i", xpsr, spsr);
 
        /* MSR1 fetched */
        arm9tdmi_clock_out(jtag_info, ARMV4_5_MSR_IM(xpsr & 0xff, 0, 1, spsr), 0, NULL, 0);
@@ -587,7 +587,7 @@ void arm9tdmi_write_core_regs(target_t *target, uint32_t mask, uint32_t core_reg
        for (i = 0; i <= 15; i++)
        {
                if (mask & (1 << i))
-                       /* nothing fetched, LDM still in EXECUTE (1+i cycle) */
+                       /* nothing fetched, LDM still in EXECUTE (1 + i cycle) */
                        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, core_regs[i], NULL, 0);
        }
        arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
@@ -817,8 +817,8 @@ int arm9tdmi_examine(struct target_s *target)
                reg_cache_t **cache_p = register_get_last_cache_p(&target->reg_cache);
                reg_cache_t *t;
                /* one extra register (vector catch) */
-               t=embeddedice_build_reg_cache(target, arm7_9);
-               if (t==NULL)
+               t = embeddedice_build_reg_cache(target, arm7_9);
+               if (t == NULL)
                        return ERROR_FAIL;
                (*cache_p) = t;
                arm7_9->eice_cache = (*cache_p);
@@ -831,13 +831,13 @@ int arm9tdmi_examine(struct target_s *target)
                }
                target_set_examined(target);
        }
-       if ((retval=embeddedice_setup(target))!=ERROR_OK)
+       if ((retval = embeddedice_setup(target)) != ERROR_OK)
                return retval;
-       if ((retval=arm7_9_setup(target))!=ERROR_OK)
+       if ((retval = arm7_9_setup(target)) != ERROR_OK)
                return retval;
        if (arm7_9->etm_ctx)
        {
-               if ((retval=etm_setup(target))!=ERROR_OK)
+               if ((retval = etm_setup(target)) != ERROR_OK)
                        return retval;
        }
        return ERROR_OK;