/* true if packed transfers are supported by the MEM-AP */
bool packed_transfers;
+
+ /* true if unaligned memory access is not supported by the MEM-AP */
+ bool unaligned_access_bad;
+
+ /* The TI TMS470 and TMS570 series processors use a BE-32 memory ordering
+ * despite lack of support in the ARMv7 architecture. Memory access through
+ * the AHB-AP has strange byte ordering these processors, and we need to
+ * swizzle appropriately. */
+ bool ti_be_32_quirks;
};
/**
return dap->ops->run(dap);
}
+static inline int dap_dp_read_atomic(struct adiv5_dap *dap, unsigned reg,
+ uint32_t *value)
+{
+ int retval;
+
+ retval = dap_queue_dp_read(dap, reg, value);
+ if (retval != ERROR_OK)
+ return retval;
+
+ return dap_run(dap);
+}
+
+static inline int dap_dp_poll_register(struct adiv5_dap *dap, unsigned reg,
+ uint32_t mask, uint32_t value, int timeout)
+{
+ assert(timeout > 0);
+ assert((value & mask) == value);
+
+ int ret;
+ uint32_t regval;
+ LOG_DEBUG("DAP: poll %x, mask 0x08%" PRIx32 ", value 0x%08" PRIx32,
+ reg, mask, value);
+ do {
+ ret = dap_dp_read_atomic(dap, reg, ®val);
+ if (ret != ERROR_OK)
+ return ret;
+
+ if ((regval & mask) == value)
+ break;
+
+ alive_sleep(10);
+ } while (--timeout);
+
+ if (!timeout) {
+ LOG_DEBUG("DAP: poll %x timeout", reg);
+ return ERROR_FAIL;
+ } else {
+ return ERROR_OK;
+ }
+}
+
/** Accessor for currently selected DAP-AP number (0..255) */
static inline uint8_t dap_ap_get_select(struct adiv5_dap *swjdp)
{