return retval;
}
-static int arm7a_handle_l2x_cache_info_command(struct command_context *cmd_ctx,
+static int arm7a_handle_l2x_cache_info_command(struct command_invocation *cmd,
struct armv7a_cache_common *armv7a_cache)
{
struct armv7a_l2x_cache *l2x_cache = (struct armv7a_l2x_cache *)
(armv7a_cache->outer_cache);
if (armv7a_cache->info == -1) {
- command_print(cmd_ctx, "cache not yet identified");
+ command_print(cmd, "cache not yet identified");
return ERROR_OK;
}
- command_print(cmd_ctx,
- "L2 unified cache Base Address 0x%" PRIx32 ", %" PRId32 " ways",
+ command_print(cmd,
+ "L2 unified cache Base Address 0x%" PRIx32 ", %" PRIu32 " ways",
l2x_cache->base, l2x_cache->way);
return ERROR_OK;
/* initialize all targets in this cluster (smp target)
* l2 cache must be configured after smp declaration */
- while (head != (struct target_list *)NULL) {
+ while (head) {
curr = head->target;
if (curr != target) {
armv7a = target_to_armv7a(curr);
if (retval)
return retval;
- return arm7a_handle_l2x_cache_info_command(CMD_CTX,
+ return arm7a_handle_l2x_cache_info_command(CMD,
&armv7a->armv7a_mmu.armv7a_cache);
}
if (CMD_ARGC != 2)
return ERROR_COMMAND_SYNTAX_ERROR;
- /* command_print(CMD_CTX, "%s %s", CMD_ARGV[0], CMD_ARGV[1]); */
+ /* command_print(CMD, "%s %s", CMD_ARGV[0], CMD_ARGV[1]); */
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], base);
COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], way);
.name = "conf",
.handler = armv7a_l2x_cache_conf_cmd,
.mode = COMMAND_ANY,
- .help = "configure l2x cache ",
+ .help = "configure l2x cache",
.usage = "<base_addr> <number_of_way>",
},
{
.name = "info",
.handler = arm7a_l2x_cache_info_command,
.mode = COMMAND_ANY,
- .help = "print cache realted information",
+ .help = "print cache related information",
.usage = "",
},
{