bool srst_asserted = false;
- if (jtag_reset_config & RESET_SRST_NO_GATING) {
+ if ((jtag_reset_config & RESET_HAS_SRST) &&
+ (jtag_reset_config & RESET_SRST_NO_GATING)) {
adapter_assert_reset();
srst_asserted = true;
}
if (retval != ERROR_OK)
return retval;
- LOG_DEBUG("Using Cortex-M3 %s", (reset_config == CORTEX_M3_RESET_SYSRESETREQ)
+ LOG_DEBUG("Using Cortex-M %s", (reset_config == CORTEX_M3_RESET_SYSRESETREQ)
? "SYSRESETREQ" : "VECTRESET");
if (reset_config == CORTEX_M3_RESET_VECTRESET) {
- LOG_WARNING("Only resetting the Cortex-M3 core, use a reset-init event "
+ LOG_WARNING("Only resetting the Cortex-M core, use a reset-init event "
"handler to reset any peripherals or configure hardware srst support.");
}
return retval;
}
-static int cortex_m3_bulk_write_memory(struct target *target, uint32_t address,
- uint32_t count, const uint8_t *buffer)
-{
- return cortex_m3_write_memory(target, address, 4, count, buffer);
-}
-
static int cortex_m3_init_target(struct command_context *cmd_ctx,
struct target *target)
{
for (j = 0; j < 3; j++, reg++)
cortex_m3_dwt_addreg(target, cache->reg_list + reg,
dwt_comp + 3 * i + j);
+
+ /* make sure we clear any watchpoints enabled on the target */
+ target_write_u32(target, comparator->dwt_comparator_address + 8, 0);
}
*register_get_last_cache_p(&target->reg_cache) = cache;
cortex_m3->fp_comparator_list[i].type =
(i < cortex_m3->fp_num_code) ? FPCR_CODE : FPCR_LITERAL;
cortex_m3->fp_comparator_list[i].fpcr_address = FP_COMP0 + 4 * i;
+
+ /* make sure we clear any breakpoints enabled on the target */
+ target_write_u32(target, cortex_m3->fp_comparator_list[i].fpcr_address, 0);
}
LOG_DEBUG("FPB fpcr 0x%" PRIx32 ", numcode %i, numlit %i",
fpcr,
struct cortex_m3_common *cm3)
{
if (cm3->common_magic != CORTEX_M3_COMMON_MAGIC) {
- command_print(cmd_ctx, "target is not a Cortex-M3");
+ command_print(cmd_ctx, "target is not a Cortex-M");
return ERROR_TARGET_INVALID;
}
return ERROR_OK;
.chain = armv7m_command_handlers,
},
{
- .name = "cortex_m3",
+ .name = "cortex_m",
.mode = COMMAND_EXEC,
- .help = "Cortex-M3 command group",
+ .help = "Cortex-M command group",
.usage = "",
.chain = cortex_m3_exec_command_handlers,
},
};
struct target_type cortexm3_target = {
- .name = "cortex_m3",
+ .name = "cortex_m",
+ .deprecated_name = "cortex_m3",
.poll = cortex_m3_poll,
.arch_state = armv7m_arch_state,
.read_memory = cortex_m3_read_memory,
.write_memory = cortex_m3_write_memory,
- .bulk_write_memory = cortex_m3_bulk_write_memory,
.checksum_memory = armv7m_checksum_memory,
.blank_check_memory = armv7m_blank_check_memory,