arm_coresight: define ARM_CS_CIDR_CLASS()

[openocd.git] / src / target / dsp563xx.h

diff --git a/src/target/dsp563xx.h b/src/target/dsp563xx.h
index 17de6c0d08f69b9208beb60881d1caae644d3c98..5c3e1d3c760cd03b004f6707245e7a4f108c88d4 100644 (file)
--- a/src/target/dsp563xx.h
+++ b/src/target/dsp563xx.h
@@ -16,8 +16,8 @@
  *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
-#ifndef DSP563XX_H
-#define DSP563XX_H
+#ifndef OPENOCD_TARGET_DSP563XX_H
+#define OPENOCD_TARGET_DSP563XX_H
 
 #include <jtag/jtag.h>
 #include <target/dsp563xx_once.h>
@@ -46,13 +46,13 @@ struct dsp563xx_common {
        struct once_reg once_regs[DSP563XX_NUMONCEREGS];
 
        /* register cache to processor synchronization */
-       int (*read_core_reg) (struct target *target, int num);
-       int (*write_core_reg) (struct target *target, int num);
+       int (*read_core_reg)(struct target *target, int num);
+       int (*write_core_reg)(struct target *target, int num);
 
        struct hardware_breakpoint hardware_breakpoint[1];
 
        /*Were the hardware breakpoints cleared on startup?*/
-       int hardware_breakpoints_cleared;
+       bool hardware_breakpoints_cleared;
 };
 
 struct dsp563xx_core_reg {
@@ -70,4 +70,4 @@ static inline struct dsp563xx_common *target_to_dsp563xx(struct target *target)
        return target->arch_info;
 }
 
-#endif /* DSP563XX_H */
+#endif /* OPENOCD_TARGET_DSP563XX_H */