target/hla_target: set cortex_m->common_magic
[openocd.git] / src / target / embeddedice.c
index 7232ef1e4685ab9b0e07d143576e9d397208f27e..a29508baf347133ec5b892b8056f16cb6621bffd 100644 (file)
@@ -205,8 +205,8 @@ struct reg_cache *embeddedice_build_reg_cache(struct target *target,
        for (i = 0; i < num_regs; i++) {
                reg_list[i].name = eice_regs[i].name;
                reg_list[i].size = eice_regs[i].width;
-               reg_list[i].dirty = 0;
-               reg_list[i].valid = 0;
+               reg_list[i].dirty = false;
+               reg_list[i].valid = false;
                reg_list[i].value = calloc(1, 4);
                reg_list[i].arch_info = &arch_info[i];
                reg_list[i].type = &eice_reg_type;
@@ -303,6 +303,22 @@ struct reg_cache *embeddedice_build_reg_cache(struct target *target,
        return reg_cache;
 }
 
+/**
+ * Free all memory allocated for EmbeddedICE register cache
+ */
+void embeddedice_free_reg_cache(struct reg_cache *reg_cache)
+{
+       if (!reg_cache)
+               return;
+
+       for (unsigned int i = 0; i < reg_cache->num_regs; i++)
+               free(reg_cache->reg_list[i].value);
+
+       free(reg_cache->reg_list[0].arch_info);
+       free(reg_cache->reg_list);
+       free(reg_cache);
+}
+
 /**
  * Initialize EmbeddedICE module, if needed.
  */
@@ -470,8 +486,8 @@ void embeddedice_set_reg(struct reg *reg, uint32_t value)
        embeddedice_write_reg(reg, value);
 
        buf_set_u32(reg->value, 0, reg->size, value);
-       reg->valid = 1;
-       reg->dirty = 0;
+       reg->valid = true;
+       reg->dirty = false;
 
 }
 
@@ -629,7 +645,6 @@ int embeddedice_handshake(struct arm_jtag *jtag_info, int hsbit, uint32_t timeou
        return ERROR_TARGET_TIMEOUT;
 }
 
-#ifndef HAVE_JTAG_MINIDRIVER_H
 /**
  * This is an inner loop of the open loop DCC write of data to target
  */
@@ -644,6 +659,3 @@ void embeddedice_write_dcc(struct jtag_tap *tap,
                buffer += 4;
        }
 }
-#else
-/* provided by minidriver */
-#endif

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