- added patch by Øyvind Harboe to Intel Hex Start Segment Address Record (Type 3)

[openocd.git] / src / target / etb.h

diff --git a/src/target/etb.h b/src/target/etb.h
index 55b7857b54f2f3ba75aab66d8e9ed8d9b4f8af3a..1a579cb39d7954e733652867810792b3dd139eef 100644 (file)
--- a/src/target/etb.h
+++ b/src/target/etb.h
@@ -20,10 +20,14 @@
 #ifndef ETB_H\r
 #define ETB_H\r
 \r
+#include "command.h"\r
 #include "target.h"\r
 #include "register.h"\r
 #include "arm_jtag.h"\r
 \r
+#include "etb.h"\r
+#include "etm.h"\r
+\r
 /* ETB registers */\r
 enum\r
 {\r
@@ -40,9 +44,14 @@ enum
 \r
 typedef struct etb_s\r
 {\r
+       etm_context_t *etm_ctx;\r
        int chain_pos;\r
        int cur_scan_chain;\r
        reg_cache_t *reg_cache;\r
+       \r
+       /* ETB parameters */\r
+       int ram_depth;\r
+       int ram_width;\r
 } etb_t;\r
 \r
 typedef struct etb_reg_s\r
@@ -51,6 +60,8 @@ typedef struct etb_reg_s
        etb_t *etb;\r
 } etb_reg_t;\r
 \r
+extern etm_capture_driver_t etb_capture_driver;\r
+\r
 extern reg_cache_t* etb_build_reg_cache(etb_t *etb);\r
 extern int etb_read_reg(reg_t *reg);\r
 extern int etb_write_reg(reg_t *reg, u32 value);\r
@@ -59,4 +70,6 @@ extern int etb_store_reg(reg_t *reg);
 extern int etb_set_reg(reg_t *reg, u32 value);\r
 extern int etb_set_reg_w_exec(reg_t *reg, u8 *buf);\r
 \r
+extern int etb_register_commands(struct command_context_s *cmd_ctx);\r
+\r
 #endif /* ETB_H */\r