- change signature for adi_jtag_dp_scan and adi_jtag_dp_scan_u32 to use swjdp_common_...
[openocd.git] / src / target / feroceon.c
index df0feb0d431328831479fc72bbdae4f2027b5c80..a6b0202203387012b47c5673254f032a73131a81 100644 (file)
 #endif
 
 #include "arm926ejs.h"
-#include "jtag.h"
-#include "log.h"
+#include "target_type.h"
 
-#include <stdlib.h>
-#include <string.h>
 
 int feroceon_examine(struct target_s *target);
 int feroceon_target_create(struct target_s *target, Jim_Interp *interp);
@@ -135,36 +132,36 @@ int feroceon_dummy_clock_out(arm_jtag_t *jtag_info, u32 instr)
        fields[0].tap = jtag_info->tap;
        fields[0].num_bits = 32;
        fields[0].out_value = out_buf;
-       fields[0].out_mask = NULL;
+       
        fields[0].in_value = NULL;
-       fields[0].in_handler = NULL;
-       fields[0].in_handler_priv = NULL;
-       fields[0].in_check_value = NULL;
-       fields[0].in_check_mask = NULL;
+       
+       
+       
+       
 
        fields[1].tap = jtag_info->tap;
        fields[1].num_bits = 3;
        fields[1].out_value = &sysspeed_buf;
-       fields[1].out_mask = NULL;
+       
        fields[1].in_value = NULL;
-       fields[1].in_check_value = NULL;
-       fields[1].in_check_mask = NULL;
-       fields[1].in_handler = NULL;
-       fields[1].in_handler_priv = NULL;
+       
+       
+       
+       
 
        fields[2].tap = jtag_info->tap;
        fields[2].num_bits = 32;
        fields[2].out_value = instr_buf;
-       fields[2].out_mask = NULL;
+       
        fields[2].in_value = NULL;
-       fields[2].in_check_value = NULL;
-       fields[2].in_check_mask = NULL;
-       fields[2].in_handler = NULL;
-       fields[2].in_handler_priv = NULL;
+       
+       
+       
+       
 
-       jtag_add_dr_scan(3, fields, -1);
+       jtag_add_dr_scan(3, fields, TAP_INVALID);
 
-       /* no jtag_add_runtest(0, -1) here */
+       /* no jtag_add_runtest(0, TAP_INVALID) here */
 
        return ERROR_OK;
 }
@@ -517,7 +514,7 @@ int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buf
        arm7_9_common_t *arm7_9 = armv4_5->arch_info;
        enum armv4_5_state core_state = armv4_5->core_state;
        u32 x, flip, shift, save[7];
-       int i;
+       u32 i;
 
        /*
         * We can't use the dcc flow control bits, so let's transfer data
@@ -547,10 +544,10 @@ int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buf
                0xeafffff3,     /*      b       3b                      */
        };
 
-       int dcc_size = sizeof(dcc_code);
+       u32 dcc_size = sizeof(dcc_code);
 
        if (!arm7_9->dcc_downloads)
-               return target->type->write_memory(target, address, 4, count, buffer);
+               return target_write_memory(target, address, 4, count, buffer);
 
        /* regrab previously allocated working_area, or allocate a new one */
        if (!arm7_9->dcc_working_area)
@@ -561,7 +558,7 @@ int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buf
                if (target_alloc_working_area(target, dcc_size, &arm7_9->dcc_working_area) != ERROR_OK)
                {
                        LOG_INFO("no working area available, falling back to memory writes");
-                       return target->type->write_memory(target, address, 4, count, buffer);
+                       return target_write_memory(target, address, 4, count, buffer);
                }
 
                /* copy target instructions to target endianness */
@@ -569,7 +566,7 @@ int feroceon_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buf
                        target_buffer_set_u32(target, dcc_code_buf + i*4, dcc_code[i]);
 
                /* write DCC code to working area */
-               if((retval = target->type->write_memory(target, arm7_9->dcc_working_area->address, 4, dcc_size, dcc_code_buf)) != ERROR_OK)
+               if((retval = target_write_memory(target, arm7_9->dcc_working_area->address, 4, dcc_size/4, dcc_code_buf)) != ERROR_OK)
                {
                        return retval;
                }

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)