Code Review / openocd.git / blobdiff
? search:
summary | shortlog | log | commit | commitdiff | review | tree
raw | inline | side by side
jtag/drivers/stlink: demote the output of available speeds to DEBUG
[openocd.git] / src / target / mips32.c
diff --git a/src/target/mips32.c b/src/target/mips32.c
index c9cbf86e4aee668f2b92d88c335beb2e619eef82..75197f170f85f5368e2bce18a1eda6d67522dac7 100644 (file)
--- a/src/target/mips32.c
+++ b/src/target/mips32.c
@@ -35,58 +35,53 @@
 #include "algorithm.h"
 #include "register.h"
 
-static char *mips32_core_reg_list[] = {
-       "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
-       "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
-       "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
-       "t8", "t9", "k0", "k1", "gp", "sp", "fp", "ra",
-       "status", "lo", "hi", "badvaddr", "cause", "pc"
-};
-
 static const char *mips_isa_strings[] = {
        "MIPS32", "MIPS16e"
 };
 
-static struct mips32_core_reg mips32_core_reg_list_arch_info[MIPS32NUMCOREREGS] = {
-       {0, NULL, NULL},
-       {1, NULL, NULL},
-       {2, NULL, NULL},
-       {3, NULL, NULL},
-       {4, NULL, NULL},
-       {5, NULL, NULL},
-       {6, NULL, NULL},
-       {7, NULL, NULL},
-       {8, NULL, NULL},
-       {9, NULL, NULL},
-       {10, NULL, NULL},
-       {11, NULL, NULL},
-       {12, NULL, NULL},
-       {13, NULL, NULL},
-       {14, NULL, NULL},
-       {15, NULL, NULL},
-       {16, NULL, NULL},
-       {17, NULL, NULL},
-       {18, NULL, NULL},
-       {19, NULL, NULL},
-       {20, NULL, NULL},
-       {21, NULL, NULL},
-       {22, NULL, NULL},
-       {23, NULL, NULL},
-       {24, NULL, NULL},
-       {25, NULL, NULL},
-       {26, NULL, NULL},
-       {27, NULL, NULL},
-       {28, NULL, NULL},
-       {29, NULL, NULL},
-       {30, NULL, NULL},
-       {31, NULL, NULL},
-
-       {32, NULL, NULL},
-       {33, NULL, NULL},
-       {34, NULL, NULL},
-       {35, NULL, NULL},
-       {36, NULL, NULL},
-       {37, NULL, NULL},
+static const struct {
+       unsigned id;
+       const char *name;
+} mips32_regs[MIPS32NUMCOREREGS] = {
+       { 0, "zero", },
+       { 1, "at", },
+       { 2, "v0", },
+       { 3, "v1", },
+       { 4, "a0", },
+       { 5, "a1", },
+       { 6, "a2", },
+       { 7, "a3", },
+       { 8, "t0", },
+       { 9, "t1", },
+       { 10, "t2", },
+       { 11, "t3", },
+       { 12, "t4", },
+       { 13, "t5", },
+       { 14, "t6", },
+       { 15, "t7", },
+       { 16, "s0", },
+       { 17, "s1", },
+       { 18, "s2", },
+       { 19, "s3", },
+       { 20, "s4", },
+       { 21, "s5", },
+       { 22, "s6", },
+       { 23, "s7", },
+       { 24, "t8", },
+       { 25, "t9", },
+       { 26, "k0", },
+       { 27, "k1", },
+       { 28, "gp", },
+       { 29, "sp", },
+       { 30, "fp", },
+       { 31, "ra", },
+
+       { 32, "status", },
+       { 33, "lo", },
+       { 34, "hi", },
+       { 35, "badvaddr", },
+       { 36, "cause", },
+       { 37, "pc" },
 };
 
 /* number of mips dummy fp regs fp0 - fp31 + fsr and fir
@@ -257,7 +252,7 @@ struct reg_cache *mips32_build_reg_cache(struct target *target)
        int num_regs = MIPS32NUMCOREREGS;
        struct reg_cache **cache_p = register_get_last_cache_p(&target->reg_cache);
        struct reg_cache *cache = malloc(sizeof(struct reg_cache));
-       struct reg *reg_list = malloc(sizeof(struct reg) * num_regs);
+       struct reg *reg_list = calloc(num_regs, sizeof(struct reg));
        struct mips32_core_reg *arch_info = malloc(sizeof(struct mips32_core_reg) * num_regs);
        int i;
 
@@ -272,10 +267,11 @@ struct reg_cache *mips32_build_reg_cache(struct target *target)
        mips32->core_cache = cache;
 
        for (i = 0; i < num_regs; i++) {
-               arch_info[i] = mips32_core_reg_list_arch_info[i];
+               arch_info[i].num = mips32_regs[i].id;
                arch_info[i].target = target;
                arch_info[i].mips32_common = mips32;
-               reg_list[i].name = mips32_core_reg_list[i];
+
+               reg_list[i].name = mips32_regs[i].name;
                reg_list[i].size = 32;
                reg_list[i].value = calloc(1, 4);
                reg_list[i].dirty = 0;
@@ -293,7 +289,7 @@ int mips32_init_arch_info(struct target *target, struct mips32_common *mips32, s
        mips32->common_magic = MIPS32_COMMON_MAGIC;
        mips32->fast_data_area = NULL;
 
-       /* has breakpoint/watchpint unit been scanned */
+       /* has breakpoint/watchpoint unit been scanned */
        mips32->bp_scanned = 0;
        mips32->data_break_list = NULL;
 
@@ -540,26 +536,36 @@ int mips32_configure_break_unit(struct target *target)
        if (retval != ERROR_OK)
                return retval;
 
-       /* EJTAG 2.0 does not specify EJTAG_DCR_IB and EJTAG_DCR_DB bits,
-        * assume IB and DB registers are always present. */
-       if (ejtag_info->ejtag_version == EJTAG_VERSION_20)
-               dcr |= EJTAG_DCR_IB | EJTAG_DCR_DB;
+       /* EJTAG 2.0 defines IB and DB bits in IMP instead of DCR. */
+       if (ejtag_info->ejtag_version == EJTAG_VERSION_20) {
+               ejtag_info->debug_caps = dcr & EJTAG_DCR_ENM;
+               if (!(ejtag_info->impcode & EJTAG_V20_IMP_NOIB))
+                       ejtag_info->debug_caps |= EJTAG_DCR_IB;
+               if (!(ejtag_info->impcode & EJTAG_V20_IMP_NODB))
+                       ejtag_info->debug_caps |= EJTAG_DCR_DB;
+       } else
+               /* keep  debug caps for later use */
+               ejtag_info->debug_caps = dcr & (EJTAG_DCR_ENM
+                               | EJTAG_DCR_IB | EJTAG_DCR_DB);
 
-       if (dcr & EJTAG_DCR_IB) {
+
+       if (ejtag_info->debug_caps & EJTAG_DCR_IB) {
                retval = mips32_configure_ibs(target);
                if (retval != ERROR_OK)
                        return retval;
        }
 
-       if (dcr & EJTAG_DCR_DB) {
+       if (ejtag_info->debug_caps & EJTAG_DCR_DB) {
                retval = mips32_configure_dbs(target);
                if (retval != ERROR_OK)
                        return retval;
        }
 
        /* check if target endianness settings matches debug control register */
-       if (((dcr & EJTAG_DCR_ENM) && (target->endianness == TARGET_LITTLE_ENDIAN)) ||
-                       (!(dcr & EJTAG_DCR_ENM) && (target->endianness == TARGET_BIG_ENDIAN)))
+       if (((ejtag_info->debug_caps & EJTAG_DCR_ENM)
+                       && (target->endianness == TARGET_LITTLE_ENDIAN)) ||
+                       (!(ejtag_info->debug_caps & EJTAG_DCR_ENM)
+                        && (target->endianness == TARGET_BIG_ENDIAN)))
                LOG_WARNING("DCR endianness settings does not match target settings");
 
        LOG_DEBUG("DCR 0x%" PRIx32 " numinst %i numdata %i", dcr, mips32->num_inst_bpoints,
@@ -610,10 +616,8 @@ int mips32_checksum_memory(struct target *target, uint32_t address,
        struct working_area *crc_algorithm;
        struct reg_param reg_params[2];
        struct mips32_algorithm mips32_info;
-       int retval;
-       uint32_t i;
 
-       /* see contib/loaders/checksum/mips32.s for src */
+       /* see contrib/loaders/checksum/mips32.s for src */
 
        static const uint32_t mips_crc_code[] = {
                0x248C0000,             /* addiu        $t4, $a0, 0 */
@@ -648,9 +652,12 @@ int mips32_checksum_memory(struct target *target, uint32_t address,
        if (target_alloc_working_area(target, sizeof(mips_crc_code), &crc_algorithm) != ERROR_OK)
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 
-       /* convert flash writing code into a buffer in target endianness */
-       for (i = 0; i < ARRAY_SIZE(mips_crc_code); i++)
-               target_write_u32(target, crc_algorithm->address + i*sizeof(uint32_t), mips_crc_code[i]);
+       /* convert mips crc code into a buffer in target endianness */
+       uint8_t mips_crc_code_8[sizeof(mips_crc_code)];
+       target_buffer_set_u32_array(target, mips_crc_code_8,
+                                       ARRAY_SIZE(mips_crc_code), mips_crc_code);
+
+       target_write_buffer(target, crc_algorithm->address, sizeof(mips_crc_code), mips_crc_code_8);
 
        mips32_info.common_magic = MIPS32_COMMON_MAGIC;
        mips32_info.isa_mode = MIPS32_ISA_MIPS32;
@@ -663,24 +670,19 @@ int mips32_checksum_memory(struct target *target, uint32_t address,
 
        int timeout = 20000 * (1 + (count / (1024 * 1024)));
 
-       retval = target_run_algorithm(target, 0, NULL, 2, reg_params,
-                       crc_algorithm->address, crc_algorithm->address + (sizeof(mips_crc_code)-4), timeout,
+       int retval = target_run_algorithm(target, 0, NULL, 2, reg_params,
+                       crc_algorithm->address, crc_algorithm->address + (sizeof(mips_crc_code) - 4), timeout,
                        &mips32_info);
-       if (retval != ERROR_OK) {
-               destroy_reg_param(&reg_params[0]);
-               destroy_reg_param(&reg_params[1]);
-               target_free_working_area(target, crc_algorithm);
-               return retval;
-       }
 
-       *checksum = buf_get_u32(reg_params[0].value, 0, 32);
+       if (retval == ERROR_OK)
+               *checksum = buf_get_u32(reg_params[0].value, 0, 32);
 
        destroy_reg_param(&reg_params[0]);
        destroy_reg_param(&reg_params[1]);
 
        target_free_working_area(target, crc_algorithm);
 
-       return ERROR_OK;
+       return retval;
 }
 
 /** Checks whether a memory region is zeroed. */
@@ -690,8 +692,6 @@ int mips32_blank_check_memory(struct target *target,
        struct working_area *erase_check_algorithm;
        struct reg_param reg_params[3];
        struct mips32_algorithm mips32_info;
-       int retval;
-       uint32_t i;
 
        static const uint32_t erase_check_code[] = {
                                                /* nbyte: */
@@ -707,11 +707,12 @@ int mips32_blank_check_memory(struct target *target,
        if (target_alloc_working_area(target, sizeof(erase_check_code), &erase_check_algorithm) != ERROR_OK)
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 
-       /* convert flash writing code into a buffer in target endianness */
-       for (i = 0; i < ARRAY_SIZE(erase_check_code); i++) {
-               target_write_u32(target, erase_check_algorithm->address + i*sizeof(uint32_t),
-                               erase_check_code[i]);
-       }
+       /* convert erase check code into a buffer in target endianness */
+       uint8_t erase_check_code_8[sizeof(erase_check_code)];
+       target_buffer_set_u32_array(target, erase_check_code_8,
+                                       ARRAY_SIZE(erase_check_code), erase_check_code);
+
+       target_write_buffer(target, erase_check_algorithm->address, sizeof(erase_check_code), erase_check_code_8);
 
        mips32_info.common_magic = MIPS32_COMMON_MAGIC;
        mips32_info.isa_mode = MIPS32_ISA_MIPS32;
@@ -725,19 +726,13 @@ int mips32_blank_check_memory(struct target *target,
        init_reg_param(&reg_params[2], "a2", 32, PARAM_IN_OUT);
        buf_set_u32(reg_params[2].value, 0, 32, 0xff);
 
-       retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
+       int retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
                        erase_check_algorithm->address,
-                       erase_check_algorithm->address + (sizeof(erase_check_code)-4),
+                       erase_check_algorithm->address + (sizeof(erase_check_code) - 4),
                        10000, &mips32_info);
-       if (retval != ERROR_OK) {
-               destroy_reg_param(&reg_params[0]);
-               destroy_reg_param(&reg_params[1]);
-               destroy_reg_param(&reg_params[2]);
-               target_free_working_area(target, erase_check_algorithm);
-               return retval;
-       }
 
-       *blank = buf_get_u32(reg_params[2].value, 0, 32);
+       if (retval == ERROR_OK)
+               *blank = buf_get_u32(reg_params[2].value, 0, 32);
 
        destroy_reg_param(&reg_params[0]);
        destroy_reg_param(&reg_params[1]);
@@ -745,7 +740,7 @@ int mips32_blank_check_memory(struct target *target,
 
        target_free_working_area(target, erase_check_algorithm);
 
-       return ERROR_OK;
+       return retval;
 }
 
 static int mips32_verify_pointer(struct command_context *cmd_ctx,
@@ -825,7 +820,7 @@ COMMAND_HANDLER(mips32_handle_scan_delay_command)
        struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
 
        if (CMD_ARGC == 1)
-               COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], ejtag_info->scan_delay);
+               COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], ejtag_info->scan_delay);
        else if (CMD_ARGC > 1)
                        return ERROR_COMMAND_SYNTAX_ERROR;
 
Open On-Chip Debugger

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)