int mips_m4k_debug_entry(target_t *target)
{
struct mips32_common *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
uint32_t debug_reg;
/* read debug register */
{
int retval;
struct mips32_common *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
uint32_t ejtag_ctrl = ejtag_info->ejtag_ctrl;
/* read ejtag control reg */
int mips_m4k_halt(struct target_s *target)
{
struct mips32_common *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
LOG_DEBUG("target->state: %s",
target_state_name(target));
int mips_m4k_assert_reset(target_t *target)
{
struct mips32_common *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
LOG_DEBUG("target->state: %s",
target_state_name(target));
int mips_m4k_single_step_core(target_t *target)
{
struct mips32_common *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
/* configure single step mode */
mips_ejtag_config_step(ejtag_info, 1);
int mips_m4k_resume(struct target_s *target, int current, uint32_t address, int handle_breakpoints, int debug_execution)
{
struct mips32_common *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
breakpoint_t *breakpoint = NULL;
uint32_t resume_pc;
{
/* get pointers to arch-specific information */
struct mips32_common *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
breakpoint_t *breakpoint = NULL;
if (target->state != TARGET_HALTED)
int mips_m4k_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
struct mips32_common *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count);
int mips_m4k_write_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
{
struct mips32_common *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count);
{
int retval;
struct mips32_common *mips32 = target->arch_info;
- mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
uint32_t idcode = 0;
if (!target_was_examined(target))