}
}
- if (ERROR_OK != nds32_examine_debug_reason(nds32)) {
+ if (nds32_examine_debug_reason(nds32) != ERROR_OK) {
nds32->target->state = backup_state;
/* re-activate all hardware breakpoints & watchpoints */
nds32_get_mapped_reg(nds32, PC, &val_pc);
- if ((NDS32_DEBUG_DATA_ADDR_WATCHPOINT_NEXT_PRECISE == reason) ||
- (NDS32_DEBUG_DATA_VALUE_WATCHPOINT_NEXT_PRECISE == reason)) {
+ if ((reason == NDS32_DEBUG_DATA_ADDR_WATCHPOINT_NEXT_PRECISE) ||
+ (reason == NDS32_DEBUG_DATA_VALUE_WATCHPOINT_NEXT_PRECISE)) {
if (edmsw & 0x4) /* check EDMSW.IS_16BIT */
val_pc -= 2;
else
return ERROR_FAIL;
} else if (match_count == 0) {
/* global stop is precise exception */
- if ((NDS32_DEBUG_LOAD_STORE_GLOBAL_STOP == reason) && nds32->global_stop) {
+ if ((reason == NDS32_DEBUG_LOAD_STORE_GLOBAL_STOP) && nds32->global_stop) {
/* parse instruction to get correct access address */
uint32_t val_pc;
uint32_t opcode;
}
int nds32_v3_checksum_memory(struct target *target,
- uint32_t address, uint32_t count, uint32_t *checksum)
+ target_addr_t address, uint32_t count, uint32_t *checksum)
{
LOG_WARNING("Not implemented: %s", __func__);
struct mem_param *mem_params,
int num_reg_params,
struct reg_param *reg_params,
- uint32_t entry_point,
- uint32_t exit_point,
+ target_addr_t entry_point,
+ target_addr_t exit_point,
int timeout_ms,
void *arch_info)
{
return ERROR_FAIL;
}
-int nds32_v3_read_buffer(struct target *target, uint32_t address,
+int nds32_v3_read_buffer(struct target *target, target_addr_t address,
uint32_t size, uint8_t *buffer)
{
struct nds32 *nds32 = target_to_nds32(target);
struct nds32_memory *memory = &(nds32->memory);
- if ((NDS_MEMORY_ACC_CPU == memory->access_channel) &&
+ if ((memory->access_channel == NDS_MEMORY_ACC_CPU) &&
(target->state != TARGET_HALTED)) {
LOG_WARNING("target was not halted");
return ERROR_TARGET_NOT_HALTED;
}
- uint32_t physical_address;
+ target_addr_t physical_address;
/* BUG: If access range crosses multiple pages, the translation will not correct
* for second page or so. */
* Because hardware will turn off IT/DT by default, it MUST translate virtual address
* to physical address.
*/
- if (ERROR_OK == target->type->virt2phys(target, address, &physical_address))
+ if (target->type->virt2phys(target, address, &physical_address) == ERROR_OK)
address = physical_address;
else
return ERROR_FAIL;
return result;
}
-int nds32_v3_write_buffer(struct target *target, uint32_t address,
+int nds32_v3_write_buffer(struct target *target, target_addr_t address,
uint32_t size, const uint8_t *buffer)
{
struct nds32 *nds32 = target_to_nds32(target);
struct nds32_memory *memory = &(nds32->memory);
- if ((NDS_MEMORY_ACC_CPU == memory->access_channel) &&
+ if ((memory->access_channel == NDS_MEMORY_ACC_CPU) &&
(target->state != TARGET_HALTED)) {
LOG_WARNING("target was not halted");
return ERROR_TARGET_NOT_HALTED;
}
- uint32_t physical_address;
+ target_addr_t physical_address;
/* BUG: If access range crosses multiple pages, the translation will not correct
* for second page or so. */
* Because hardware will turn off IT/DT by default, it MUST translate virtual address
* to physical address.
*/
- if (ERROR_OK == target->type->virt2phys(target, address, &physical_address))
+ if (target->type->virt2phys(target, address, &physical_address) == ERROR_OK)
address = physical_address;
else
return ERROR_FAIL;
int result;
result = nds32_gdb_fileio_write_memory(nds32, address, size, buffer);
- if (NDS_MEMORY_ACC_CPU == origin_access_channel) {
+ if (origin_access_channel == NDS_MEMORY_ACC_CPU) {
memory->access_channel = NDS_MEMORY_ACC_CPU;
aice_memory_access(aice, NDS_MEMORY_ACC_CPU);
}
return nds32_write_buffer(target, address, size, buffer);
}
-int nds32_v3_read_memory(struct target *target, uint32_t address,
+int nds32_v3_read_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, uint8_t *buffer)
{
struct nds32 *nds32 = target_to_nds32(target);
struct nds32_memory *memory = &(nds32->memory);
- if ((NDS_MEMORY_ACC_CPU == memory->access_channel) &&
+ if ((memory->access_channel == NDS_MEMORY_ACC_CPU) &&
(target->state != TARGET_HALTED)) {
LOG_WARNING("target was not halted");
return ERROR_TARGET_NOT_HALTED;
}
- uint32_t physical_address;
+ target_addr_t physical_address;
/* BUG: If access range crosses multiple pages, the translation will not correct
* for second page or so. */
* Because hardware will turn off IT/DT by default, it MUST translate virtual address
* to physical address.
*/
- if (ERROR_OK == target->type->virt2phys(target, address, &physical_address))
+ if (target->type->virt2phys(target, address, &physical_address) == ERROR_OK)
address = physical_address;
else
return ERROR_FAIL;
return result;
}
-int nds32_v3_write_memory(struct target *target, uint32_t address,
+int nds32_v3_write_memory(struct target *target, target_addr_t address,
uint32_t size, uint32_t count, const uint8_t *buffer)
{
struct nds32 *nds32 = target_to_nds32(target);
struct nds32_memory *memory = &(nds32->memory);
- if ((NDS_MEMORY_ACC_CPU == memory->access_channel) &&
+ if ((memory->access_channel == NDS_MEMORY_ACC_CPU) &&
(target->state != TARGET_HALTED)) {
LOG_WARNING("target was not halted");
return ERROR_TARGET_NOT_HALTED;
}
- uint32_t physical_address;
+ target_addr_t physical_address;
/* BUG: If access range crosses multiple pages, the translation will not correct
* for second page or so. */
* Because hardware will turn off IT/DT by default, it MUST translate virtual address
* to physical address.
*/
- if (ERROR_OK == target->type->virt2phys(target, address, &physical_address))
+ if (target->type->virt2phys(target, address, &physical_address) == ERROR_OK)
address = physical_address;
else
return ERROR_FAIL;