typo

[openocd.git] / src / target / target / lm3s6965.cfg

diff --git a/src/target/target/lm3s6965.cfg b/src/target/target/lm3s6965.cfg
index 55563f7fc4df2f8e6122a9f9297057bec18029ea..9b21cba0e1ea12261d678f3ef4a5a7d8bed5d9d4 100644 (file)
--- a/src/target/target/lm3s6965.cfg
+++ b/src/target/target/lm3s6965.cfg
@@ -1,19 +1,20 @@
-jtag_nsrst_delay 500\r
-jtag_ntrst_delay 500\r
-\r
-#LM3S811 Evaluation Board has only srst\r
-reset_config trst_and_srst srst_pulls_trst\r
-\r
-#jtag scan chain\r
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)\r
-jtag_device 4 0x1 0xf 0xe\r
-\r
-target cortex_m3 little run_and_halt 0\r
-\r
-# 4k working area at base of ram\r
-working_area 0 0x20000000 0x4000 nobackup\r
-\r
-#flash configuration\r
-#flash bank stellaris 0 262144 0 0 0\r
-flash bank stellaris 0 0 0 0 0\r
-#flash write_image main.bin 0 bin\r
+jtag_nsrst_delay 100
+jtag_ntrst_delay 100
+
+#LM3S6965 Evaluation Board has only srst
+reset_config srst_only
+
+#jtag scan chain
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
+jtag_device 4 0x1 0xf 0xe
+
+# the luminary variant causes a software reset rather than asserting SRST
+# this stops the debug registers from being cleared
+# this will be fixed in later revisions of silicon
+target cortex_m3 little reset_halt 0 lm3s
+
+# 4k working area at base of ram
+working_area 0 0x20000000 0x4000 nobackup
+
+#flash configuration
+flash bank stellaris 0 0 0 0 0