Code Review / openocd.git / blobdiff
? search:
summary | shortlog | log | commit | commitdiff | review | tree
raw | inline | side by side
Scrub final vestiges of in_handler from mips target APIs.
[openocd.git] / src / target / xscale.c
diff --git a/src/target/xscale.c b/src/target/xscale.c
index 304477656f49b3c71bd000a6af9a9cd3da361512..7838e50e6b729ce79d6bb64b562b8cf3008cc199 100644 (file)
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -24,30 +24,13 @@
 #include "config.h"
 #endif
 
-#include "replacements.h"
-
 #include "xscale.h"
-
+#include "target_type.h"
 #include "arm7_9_common.h"
-#include "register.h"
-#include "target.h"
-#include "armv4_5.h"
 #include "arm_simulator.h"
 #include "arm_disassembler.h"
-#include "log.h"
-#include "jtag.h"
-#include "binarybuffer.h"
 #include "time_support.h"
-#include "breakpoints.h"
-#include "fileio.h"
-
-#include <stdlib.h>
-#include <string.h>
-
-#include <sys/types.h>
-#include <unistd.h>
-#include <errno.h>
-
+#include "image.h"
 
 /* cli handling */
 int xscale_register_commands(struct command_context_s *cmd_ctx);
@@ -225,11 +208,14 @@ int xscale_jtag_set_instr(jtag_tap_t *tap, u32 new_instr)
                field.num_bits = tap->ir_length;
                field.out_value = calloc(CEIL(field.num_bits, 8), 1);
                buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
-               field.out_mask = NULL;
-               field.in_value = NULL;
-               jtag_set_check_value(&field, tap->expected, tap->expected_mask, NULL);
 
-               jtag_add_ir_scan(1, &field, -1);
+               u8 tmp[4];
+               field.in_value = tmp;
+
+               jtag_add_ir_scan(1, &field, TAP_INVALID);
+
+               /* FIX!!!! isn't this check superfluous? verify_ircapture handles this? */
+               jtag_check_value_mask(&field, tap->expected, tap->expected_mask);
 
                free(field.out_value);
        }
@@ -261,28 +247,25 @@ int xscale_read_dcsr(target_t *target)
        fields[0].tap = xscale->jtag_info.tap;
        fields[0].num_bits = 3;
        fields[0].out_value = &field0;
-       fields[0].out_mask = NULL;
-       fields[0].in_value = NULL;
-       jtag_set_check_value(fields+0, &field0_check_value, &field0_check_mask, NULL);
+       u8 tmp;
+       fields[0].in_value = &tmp;
 
        fields[1].tap = xscale->jtag_info.tap;
        fields[1].num_bits = 32;
        fields[1].out_value = NULL;
-       fields[1].out_mask = NULL;
        fields[1].in_value = xscale->reg_cache->reg_list[XSCALE_DCSR].value;
-       fields[1].in_handler = NULL;
-       fields[1].in_handler_priv = NULL;
-       fields[1].in_check_value = NULL;
-       fields[1].in_check_mask = NULL;
+
 
        fields[2].tap = xscale->jtag_info.tap;
        fields[2].num_bits = 1;
        fields[2].out_value = &field2;
-       fields[2].out_mask = NULL;
-       fields[2].in_value = NULL;
-       jtag_set_check_value(fields+2, &field2_check_value, &field2_check_mask, NULL);
+       u8 tmp2;
+       fields[2].in_value = &tmp2;
+
+       jtag_add_dr_scan(3, fields, TAP_INVALID);
 
-       jtag_add_dr_scan(3, fields, -1);
+       jtag_check_value_mask(fields+0, &field0_check_value, &field0_check_mask);
+       jtag_check_value_mask(fields+2, &field2_check_value, &field2_check_mask);
 
        if ((retval = jtag_execute_queue()) != ERROR_OK)
        {
@@ -302,13 +285,19 @@ int xscale_read_dcsr(target_t *target)
 
        jtag_add_end_state(TAP_IDLE);
 
-       jtag_add_dr_scan(3, fields, -1);
+       jtag_add_dr_scan(3, fields, TAP_INVALID);
 
        /* DANGER!!! this must be here. It will make sure that the arguments
         * to jtag_set_check_value() does not go out of scope! */
        return jtag_execute_queue();
 }
 
+
+static void xscale_getbuf(u8 *in)
+{
+       *((u32 *)in)=buf_get_u32(in, 0, 32);
+}
+
 int xscale_receive(target_t *target, u32 *buffer, int num_words)
 {
        if (num_words==0)
@@ -318,7 +307,7 @@ int xscale_receive(target_t *target, u32 *buffer, int num_words)
        armv4_5_common_t *armv4_5 = target->arch_info;
        xscale_common_t *xscale = armv4_5->arch_info;
 
-       enum tap_state path[3];
+       tap_state_t path[3];
        scan_field_t fields[3];
 
        u8 *field0 = malloc(num_words * 1);
@@ -339,32 +328,26 @@ int xscale_receive(target_t *target, u32 *buffer, int num_words)
        fields[0].tap = xscale->jtag_info.tap;
        fields[0].num_bits = 3;
        fields[0].out_value = NULL;
-       fields[0].out_mask = NULL;
        fields[0].in_value = NULL;
-       jtag_set_check_value(fields+0, &field0_check_value, &field0_check_mask, NULL);
+       fields[0].check_value = &field0_check_value;
+       fields[0].check_mask = &field0_check_mask;
 
        fields[1].tap = xscale->jtag_info.tap;
        fields[1].num_bits = 32;
        fields[1].out_value = NULL;
-       fields[1].out_mask = NULL;
-       fields[1].in_value = NULL;
-       fields[1].in_handler = NULL;
-       fields[1].in_handler_priv = NULL;
-       fields[1].in_check_value = NULL;
-       fields[1].in_check_mask = NULL;
-
-
+       fields[1].check_value = NULL;
+       fields[1].check_mask = NULL;
 
        fields[2].tap = xscale->jtag_info.tap;
        fields[2].num_bits = 1;
        fields[2].out_value = NULL;
-       fields[2].out_mask = NULL;
        fields[2].in_value = NULL;
-       jtag_set_check_value(fields+2, &field2_check_value, &field2_check_mask, NULL);
+       fields[2].check_value = &field2_check_value;
+       fields[2].check_mask = &field2_check_mask;
 
        jtag_add_end_state(TAP_IDLE);
        xscale_jtag_set_instr(xscale->jtag_info.tap, xscale->jtag_info.dbgtx);
-       jtag_add_runtest(1, -1); /* ensures that we're in the TAP_IDLE state as the above could be a no-op */
+       jtag_add_runtest(1, TAP_INVALID); /* ensures that we're in the TAP_IDLE state as the above could be a no-op */
 
        /* repeat until all words have been collected */
        int attempts=0;
@@ -375,11 +358,15 @@ int xscale_receive(target_t *target, u32 *buffer, int num_words)
                for (i = words_done; i < num_words; i++)
                {
                        fields[0].in_value = &field0[i];
-                       fields[1].in_handler = buf_to_u32_handler;
-                       fields[1].in_handler_priv = (u8*)&field1[i];
 
                        jtag_add_pathmove(3, path);
-                       jtag_add_dr_scan(3, fields, TAP_IDLE);
+
+                       fields[1].in_value = (u8 *)(field1+i);
+
+                       jtag_add_dr_scan_check(3, fields, TAP_IDLE);
+
+                       jtag_add_callback(xscale_getbuf, (u8 *)(field1+i));
+
                        words_scheduled++;
                }
 
@@ -429,8 +416,8 @@ int xscale_read_tx(target_t *target, int consume)
 {
        armv4_5_common_t *armv4_5 = target->arch_info;
        xscale_common_t *xscale = armv4_5->arch_info;
-       enum tap_state path[3];
-       enum tap_state noconsume_path[6];
+       tap_state_t path[3];
+       tap_state_t noconsume_path[6];
 
        int retval;
        struct timeval timeout, now;
@@ -460,28 +447,19 @@ int xscale_read_tx(target_t *target, int consume)
        fields[0].tap = xscale->jtag_info.tap;
        fields[0].num_bits = 3;
        fields[0].out_value = NULL;
-       fields[0].out_mask = NULL;
        fields[0].in_value = &field0_in;
-       jtag_set_check_value(fields+0, &field0_check_value, &field0_check_mask, NULL);
 
        fields[1].tap = xscale->jtag_info.tap;
        fields[1].num_bits = 32;
        fields[1].out_value = NULL;
-       fields[1].out_mask = NULL;
        fields[1].in_value = xscale->reg_cache->reg_list[XSCALE_TX].value;
-       fields[1].in_handler = NULL;
-       fields[1].in_handler_priv = NULL;
-       fields[1].in_check_value = NULL;
-       fields[1].in_check_mask = NULL;
-
 
 
        fields[2].tap = xscale->jtag_info.tap;
        fields[2].num_bits = 1;
        fields[2].out_value = NULL;
-       fields[2].out_mask = NULL;
-       fields[2].in_value = NULL;
-       jtag_set_check_value(fields+2, &field2_check_value, &field2_check_mask, NULL);
+       u8 tmp;
+       fields[2].in_value = &tmp;
 
        gettimeofday(&timeout, NULL);
        timeval_add_time(&timeout, 1, 0);
@@ -501,6 +479,9 @@ int xscale_read_tx(target_t *target, int consume)
 
                jtag_add_dr_scan(3, fields, TAP_IDLE);
 
+               jtag_check_value_mask(fields+0, &field0_check_value, &field0_check_mask);
+               jtag_check_value_mask(fields+2, &field2_check_value, &field2_check_mask);
+
                if ((retval = jtag_execute_queue()) != ERROR_OK)
                {
                        LOG_ERROR("JTAG error while reading TX");
@@ -558,28 +539,19 @@ int xscale_write_rx(target_t *target)
        fields[0].tap = xscale->jtag_info.tap;
        fields[0].num_bits = 3;
        fields[0].out_value = &field0_out;
-       fields[0].out_mask = NULL;
        fields[0].in_value = &field0_in;
-       jtag_set_check_value(fields+0, &field0_check_value, &field0_check_mask, NULL);
 
        fields[1].tap = xscale->jtag_info.tap;
        fields[1].num_bits = 32;
        fields[1].out_value = xscale->reg_cache->reg_list[XSCALE_RX].value;
-       fields[1].out_mask = NULL;
        fields[1].in_value = NULL;
-       fields[1].in_handler = NULL;
-       fields[1].in_handler_priv = NULL;
-       fields[1].in_check_value = NULL;
-       fields[1].in_check_mask = NULL;
-
 
 
        fields[2].tap = xscale->jtag_info.tap;
        fields[2].num_bits = 1;
        fields[2].out_value = &field2;
-       fields[2].out_mask = NULL;
-       fields[2].in_value = NULL;
-       jtag_set_check_value(fields+2, &field2_check_value, &field2_check_mask, NULL);
+       u8 tmp;
+       fields[2].in_value = &tmp;
 
        gettimeofday(&timeout, NULL);
        timeval_add_time(&timeout, 1, 0);
@@ -590,6 +562,9 @@ int xscale_write_rx(target_t *target)
        {
                jtag_add_dr_scan(3, fields, TAP_IDLE);
 
+               jtag_check_value_mask(fields+0, &field0_check_value, &field0_check_mask);
+               jtag_check_value_mask(fields+2, &field2_check_value, &field2_check_mask);
+
                if ((retval = jtag_execute_queue()) != ERROR_OK)
                {
                        LOG_ERROR("JTAG error while writing RX");
@@ -735,30 +710,25 @@ int xscale_write_dcsr(target_t *target, int hold_rst, int ext_dbg_brk)
        fields[0].tap = xscale->jtag_info.tap;
        fields[0].num_bits = 3;
        fields[0].out_value = &field0;
-       fields[0].out_mask = NULL;
-       fields[0].in_value = NULL;
-       jtag_set_check_value(fields+0, &field0_check_value, &field0_check_mask, NULL);
+       u8 tmp;
+       fields[0].in_value = &tmp;
 
        fields[1].tap = xscale->jtag_info.tap;
        fields[1].num_bits = 32;
        fields[1].out_value = xscale->reg_cache->reg_list[XSCALE_DCSR].value;
-       fields[1].out_mask = NULL;
        fields[1].in_value = NULL;
-       fields[1].in_handler = NULL;
-       fields[1].in_handler_priv = NULL;
-       fields[1].in_check_value = NULL;
-       fields[1].in_check_mask = NULL;
-
 
 
        fields[2].tap = xscale->jtag_info.tap;
        fields[2].num_bits = 1;
        fields[2].out_value = &field2;
-       fields[2].out_mask = NULL;
-       fields[2].in_value = NULL;
-       jtag_set_check_value(fields+2, &field2_check_value, &field2_check_mask, NULL);
+       u8 tmp2;
+       fields[2].in_value = &tmp2;
+
+       jtag_add_dr_scan(3, fields, TAP_INVALID);
 
-       jtag_add_dr_scan(3, fields, -1);
+       jtag_check_value_mask(fields+0, &field0_check_value, &field0_check_mask);
+       jtag_check_value_mask(fields+2, &field2_check_value, &field2_check_mask);
 
        if ((retval = jtag_execute_queue()) != ERROR_OK)
        {
@@ -813,24 +783,24 @@ int xscale_load_ic(target_t *target, int mini, u32 va, u32 buffer[8])
        fields[0].tap = xscale->jtag_info.tap;
        fields[0].num_bits = 6;
        fields[0].out_value = &cmd;
-       fields[0].out_mask = NULL;
+
        fields[0].in_value = NULL;
-       fields[0].in_check_value = NULL;
-       fields[0].in_check_mask = NULL;
-       fields[0].in_handler = NULL;
-       fields[0].in_handler_priv = NULL;
+
+
+
+
 
        fields[1].tap = xscale->jtag_info.tap;
        fields[1].num_bits = 27;
        fields[1].out_value = packet;
-       fields[1].out_mask = NULL;
+
        fields[1].in_value = NULL;
-       fields[1].in_check_value = NULL;
-       fields[1].in_check_mask = NULL;
-       fields[1].in_handler = NULL;
-       fields[1].in_handler_priv = NULL;
 
-       jtag_add_dr_scan(2, fields, -1);
+
+
+
+
+       jtag_add_dr_scan(2, fields, TAP_INVALID);
 
        fields[0].num_bits = 32;
        fields[0].out_value = packet;
@@ -841,8 +811,12 @@ int xscale_load_ic(target_t *target, int mini, u32 va, u32 buffer[8])
        for (word = 0; word < 8; word++)
        {
                buf_set_u32(packet, 0, 32, buffer[word]);
-               cmd = parity(*((u32*)packet));
-               jtag_add_dr_scan(2, fields, -1);
+
+               u32 value;
+               memcpy(&value, packet, sizeof(u32));
+               cmd = parity(value);
+
+               jtag_add_dr_scan(2, fields, TAP_INVALID);
        }
 
        jtag_execute_queue();
@@ -871,24 +845,24 @@ int xscale_invalidate_ic_line(target_t *target, u32 va)
        fields[0].tap = xscale->jtag_info.tap;
        fields[0].num_bits = 6;
        fields[0].out_value = &cmd;
-       fields[0].out_mask = NULL;
+
        fields[0].in_value = NULL;
-       fields[0].in_check_value = NULL;
-       fields[0].in_check_mask = NULL;
-       fields[0].in_handler = NULL;
-       fields[0].in_handler_priv = NULL;
+
+
+
+
 
        fields[1].tap = xscale->jtag_info.tap;
        fields[1].num_bits = 27;
        fields[1].out_value = packet;
-       fields[1].out_mask = NULL;
+
        fields[1].in_value = NULL;
-       fields[1].in_check_value = NULL;
-       fields[1].in_check_mask = NULL;
-       fields[1].in_handler = NULL;
-       fields[1].in_handler_priv = NULL;
 
-       jtag_add_dr_scan(2, fields, -1);
+
+
+
+
+       jtag_add_dr_scan(2, fields, TAP_INVALID);
 
        return ERROR_OK;
 }
@@ -1458,17 +1432,18 @@ static int xscale_step_inner(struct target_s *target, int current, u32 address,
        armv4_5_common_t *armv4_5 = target->arch_info;
        xscale_common_t *xscale = armv4_5->arch_info;
 
-       u32 current_pc, next_pc;
+       u32 next_pc;
        int retval;
        int i;
 
-
        target->debug_reason = DBG_REASON_SINGLESTEP;
 
        /* calculate PC of next instruction */
        if ((retval = arm_simulate_step(target, &next_pc)) != ERROR_OK)
        {
-               u32 current_opcode;
+               u32 current_opcode, current_pc;
+               current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
+
                target_read_u32(target, current_pc, &current_opcode);
                LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8x", current_opcode);
                return retval;
@@ -1638,7 +1613,7 @@ int xscale_deassert_reset(target_t *target)
        u32 binary_size;
 
        u32 buf_cnt;
-       int i;
+       u32 i;
        int retval;
 
        breakpoint_t *breakpoint = target->breakpoints;
@@ -1718,7 +1693,7 @@ int xscale_deassert_reset(target_t *target)
 
                        for (; buf_cnt < 32; buf_cnt += 4)
                        {
-                                       cache_line[buf_cnt / 4] = 0xe1a08008;
+                               cache_line[buf_cnt / 4] = 0xe1a08008;
                        }
 
                        /* only load addresses other than the reset vectors */
@@ -1766,19 +1741,16 @@ int xscale_deassert_reset(target_t *target)
                jtag_add_reset(0, 0);
        }
 
-
        return ERROR_OK;
 }
 
 int xscale_soft_reset_halt(struct target_s *target)
 {
-
        return ERROR_OK;
 }
 
 int xscale_read_core_reg(struct target_s *target, int num, enum armv4_5_mode mode)
 {
-
        return ERROR_OK;
 }
 
@@ -1938,7 +1910,7 @@ int xscale_read_memory(struct target_s *target, u32 address, u32 size, u32 count
        armv4_5_common_t *armv4_5 = target->arch_info;
        xscale_common_t *xscale = armv4_5->arch_info;
        u32 *buf32;
-       int i;
+       u32 i;
        int retval;
 
        LOG_DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count);
@@ -2216,7 +2188,7 @@ int xscale_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
                if (breakpoint->length == 4)
                {
                        /* keep the original instruction in target endianness */
-                       if((retval = target->type->read_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr)) != ERROR_OK)
+                       if((retval = target_read_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr)) != ERROR_OK)
                        {
                                return retval;
                        }
@@ -2229,7 +2201,7 @@ int xscale_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
                else
                {
                        /* keep the original instruction in target endianness */
-                       if((retval = target->type->read_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr)) != ERROR_OK)
+                       if((retval = target_read_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr)) != ERROR_OK)
                        {
                                return retval;
                        }
@@ -2243,7 +2215,6 @@ int xscale_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
        }
 
        return ERROR_OK;
-
 }
 
 int xscale_add_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
@@ -2314,14 +2285,14 @@ int xscale_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
                /* restore original instruction (kept in target endianness) */
                if (breakpoint->length == 4)
                {
-                       if((retval = target->type->write_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr)) != ERROR_OK)
+                       if((retval = target_write_memory(target, breakpoint->address, 4, 1, breakpoint->orig_instr)) != ERROR_OK)
                        {
                                return retval;
                        }
                }
                else
                {
-                       if((retval = target->type->write_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr)) != ERROR_OK)
+                       if((retval = target_write_memory(target, breakpoint->address, 2, 1, breakpoint->orig_instr)) != ERROR_OK)
                        {
                                return retval;
                        }
@@ -2944,7 +2915,7 @@ int xscale_analyze_trace(target_t *target, command_context_t *cmd_ctx)
                                                (((instruction.type == ARM_B) ||
                                                        (instruction.type == ARM_BL) ||
                                                        (instruction.type == ARM_BLX)) &&
-                                                       (instruction.info.b_bl_bx_blx.target_address != -1)))
+                                                       (instruction.info.b_bl_bx_blx.target_address != 0xffffffff)))
                                        {
                                                xscale->trace.current_pc = instruction.info.b_bl_bx_blx.target_address;
                                        }
@@ -3041,7 +3012,6 @@ int xscale_init_target(struct command_context_s *cmd_ctx, struct target_s *targe
 
 int xscale_quit(void)
 {
-
        return ERROR_OK;
 }
 
@@ -3178,9 +3148,9 @@ int xscale_handle_debug_handler_command(struct command_context_s *cmd_ctx, char
                return ERROR_OK;
        }
 
-       if ((target = get_target_by_num(strtoul(args[0], NULL, 0))) == NULL)
+       if ((target = get_target(args[0])) == NULL)
        {
-               LOG_ERROR("no target '%s' configured", args[0]);
+               LOG_ERROR("target '%s' not defined", args[0]);
                return ERROR_FAIL;
        }
 
@@ -3218,9 +3188,10 @@ int xscale_handle_cache_clean_address_command(struct command_context_s *cmd_ctx,
                return ERROR_COMMAND_SYNTAX_ERROR;
        }
 
-       if ((target = get_target_by_num(strtoul(args[0], NULL, 0))) == NULL)
+       target = get_target(args[0]);
+       if (target == NULL)
        {
-               LOG_ERROR("no target '%s' configured", args[0]);
+               LOG_ERROR("target '%s' not defined", args[0]);
                return ERROR_FAIL;
        }
 
@@ -3267,7 +3238,6 @@ static int xscale_virt2phys(struct target_s *target, u32 virtual, u32 *physical)
        int domain;
        u32 ap;
 
-
        if ((retval = xscale_get_arch_pointers(target, &armv4_5, &xscale)) != ERROR_OK)
        {
                return retval;
@@ -3295,7 +3265,6 @@ static int xscale_mmu(struct target_s *target, int *enabled)
        return ERROR_OK;
 }
 
-
 int xscale_handle_mmu_command(command_context_t *cmd_ctx, char *cmd, char **args, int argc)
 {
        target_t *target = get_current_target(cmd_ctx);
Open On-Chip Debugger

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)