target/xtensa: avoid IHI for writes to non-executable memory

[openocd.git] / src / target / xscale.h

diff --git a/src/target/xscale.h b/src/target/xscale.h
index c5cd7b7746bba45d0e4239bc2278f38d7f8d5ea7..36a69bca3998b3bc10b6c1751058d1f4362756bf 100644 (file)
--- a/src/target/xscale.h
+++ b/src/target/xscale.h
@@ -1,34 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
 /***************************************************************************
  *   Copyright (C) 2005 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
  *                                                                         *
  *   Copyright (C) 2007,2008 Øyvind Harboe                                 *
  *   oyvind.harboe@zylin.com                                               *
- *                                                                         *
- *   This program is free software; you can redistribute it and/or modify  *
- *   it under the terms of the GNU General Public License as published by  *
- *   the Free Software Foundation; either version 2 of the License, or     *
- *   (at your option) any later version.                                   *
- *                                                                         *
- *   This program is distributed in the hope that it will be useful,       *
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
- *   GNU General Public License for more details.                          *
- *                                                                         *
- *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
  ***************************************************************************/
 
-#ifndef XSCALE_H
-#define XSCALE_H
+#ifndef OPENOCD_TARGET_XSCALE_H
+#define OPENOCD_TARGET_XSCALE_H
 
 #include "arm.h"
 #include "armv4_5_mmu.h"
 #include "trace.h"
 
-#define        XSCALE_COMMON_MAGIC 0x58534341
+#define        XSCALE_COMMON_MAGIC 0x58534341U
 
 /* These four JTAG instructions are architecturally defined.
  * Lengths are core-specific; originally 5 bits, later 7.
@@ -84,11 +71,11 @@ struct xscale_trace {
 };
 
 struct xscale_common {
+       unsigned int common_magic;
+
        /* armv4/5 common stuff */
        struct arm arm;
 
-       int common_magic;
-
        /* XScale registers (CP15, DBG) */
        struct reg_cache *reg_cache;
 
@@ -176,4 +163,15 @@ enum {
 
 #define ERROR_XSCALE_NO_TRACE_DATA     (-700)
 
-#endif /* XSCALE_H */
+/* DCSR bit and field definitions */
+#define DCSR_TR        (1 << 16)
+#define DCSR_TU        (1 << 17)
+#define DCSR_TS        (1 << 18)
+#define DCSR_TA        (1 << 19)
+#define DCSR_TD        (1 << 20)
+#define DCSR_TI        (1 << 22)
+#define DCSR_TF        (1 << 23)
+#define DCSR_TRAP_MASK \
+       (DCSR_TF | DCSR_TI | DCSR_TD | DCSR_TA | DCSR_TS | DCSR_TU | DCSR_TR)
+
+#endif /* OPENOCD_TARGET_XSCALE_H */