tcl: am437x: disable watchdog on reset-end

[openocd.git] / tcl / target / am437x.cfg

diff --git a/tcl/target/am437x.cfg b/tcl/target/am437x.cfg
index d7d475300f84a82b3b90ef70d570506791f3c044..ee62ef9290cd5ae804fd8c21611721a507337476 100644 (file)
--- a/tcl/target/am437x.cfg
+++ b/tcl/target/am437x.cfg
@@ -1,4 +1,5 @@
 source [find target/icepick.cfg]
+source [find mem_helper.tcl]
 
 ###############################################################################
 ##                             AM437x Registers                             ##
@@ -481,3 +482,31 @@ target create $_TARGETNAME cortex_a -chain-position $_CHIPNAME.dap -dbgbase 0x80
 
 # SRAM: 256K at 0x4030.0000
 $_TARGETNAME configure -work-area-phys 0x40300000 -work-area-size 0x40000
+
+# Disables watchdog timer after reset otherwise board won't stay in
+# halted state.
+proc disable_watchdog { } {
+       global WDT1_WSPR
+       global WDT1_W_PEND_WSPR
+       global _TARGETNAME
+
+       set curstate [$_TARGETNAME curstate]
+
+       if { [string compare $curstate halted] == 0 } {
+               set WDT_DISABLE_SEQ1    0xaaaa
+               set WDT_DISABLE_SEQ2    0x5555
+
+               mww phys $WDT1_WSPR $WDT_DISABLE_SEQ1
+
+               # Empty body to make sure this executes as fast as possible.
+               # We don't want any delays here otherwise romcode might start
+               # executing and end up changing state of certain IPs.
+               while { [expr [mrw $WDT1_W_PEND_WSPR] & 0x10] } { }
+
+               mww phys $WDT1_WSPR $WDT_DISABLE_SEQ2
+               while { [expr [mrw $WDT1_W_PEND_WSPR] & 0x10] } { }
+       }
+}
+
+$_TARGETNAME configure -event reset-start { adapter_khz 1000 }
+$_TARGETNAME configure -event reset-end { disable_watchdog }