target: Use target_addr_t for algorithm addresses.

[openocd.git] / tcl / target / icepick.cfg

diff --git a/tcl/target/icepick.cfg b/tcl/target/icepick.cfg
index 36b0b7033b88ba333d75744546179b9eb245c00b..cc824ad0e951d45e5fe3f4135aeb78e5dbb2e230 100644 (file)
--- a/tcl/target/icepick.cfg
+++ b/tcl/target/icepick.cfg
@@ -54,8 +54,8 @@ proc icepick_c_disconnect {jrc} {
 proc icepick_c_router {jrc rw block register payload} {
 
        set new_dr_value \
-               [expr ( ($rw & 0x1) << 31)        | ( ($block & 0x7) << 28) | \
-                       ( ($register & 0xF) << 24)  | ( $payload & 0xFFFFFF ) ]
+               [expr { ( ($rw & 0x1) << 31)        | ( ($block & 0x7) << 28) | \
+                               ( ($register & 0xF) << 24)  | ( $payload & 0xFFFFFF ) } ]
 
 #      echo "\tNew router value:\t0x[format %x $new_dr_value]"
 
@@ -75,9 +75,22 @@ proc icepick_c_setup {jrc} {
 }
 
 # jrc  == TAP name for the ICEpick
-# port == a port number, 0..15
+# port == a port number, 0..15 for debug tap, 16..31 for test tap
 proc icepick_c_tapenable {jrc port} {
 
+       if { ($port >= 0) && ($port < 16) } {
+               # Debug tap"
+               set tap $port
+               set block 0x2
+       } elseif { $port < 32 } {
+               # Test tap
+               set tap [expr {$port - 16}]
+               set block 0x1
+       } else {
+               echo "ERROR: Invalid ICEPick C port number: $port"
+               return
+       }
+
        # First CONNECT to the ICEPick
 #      echo "Connecting to ICEPick"
        icepick_c_connect $jrc
@@ -90,18 +103,18 @@ proc icepick_c_tapenable {jrc port} {
        # And never to enter RESET, which will disable the TAPs.
 
        # first enable power and clock for TAP
-       icepick_c_router $jrc 1 0x2 $port 0x110048
+       icepick_c_router $jrc 1 $block $tap 0x110048
 
        # TRM states that the register should be read back here, skipped for now
 
        # enable debug "default" mode
-       icepick_c_router $jrc 1 0x2 $port 0x112048
+       icepick_c_router $jrc 1 $block $tap 0x112048
 
        # TRM states that debug enable and debug mode should be read back and
        # confirmed - skipped for now
 
        # Finally select the tap
-       icepick_c_router $jrc 1 0x2 $port 0x112148
+       icepick_c_router $jrc 1 $block $tap 0x112148
 
        # Enter the bypass state
        irscan $jrc [CONST IR_BYPASS] -endstate RUN/IDLE
@@ -119,6 +132,7 @@ proc icepick_d_set_core_control {jrc coreid value } {
 # Follow the sequence described in
 # http://processors.wiki.ti.com/images/f/f6/Router_Scan_Sequence-ICEpick-D.pdf
 proc icepick_d_tapenable {jrc port coreid { value 0x2008 } } {
+
        # First CONNECT to the ICEPick
        icepick_c_connect $jrc
        icepick_c_setup $jrc