global _DEVICECLASS
-if { [info exists DEVICECLASS ] } {
+if { [info exists DEVICECLASS] } {
set _DEVICECLASS $DEVICECLASS
} else {
set _DEVICECLASS 0xff
# are usable only for ISP style initial flash programming.
if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
+ set _CHIPNAME $CHIPNAME
} else {
- set _CHIPNAME lm3s
+ set _CHIPNAME lm3s
}
# CPU TAP ID 0x1ba00477 for early Sandstorm parts
# CPU TAP ID 0x2ba00477 for later SandStorm parts, e.g. lm3s811 Rev C2
# CPU TAP ID 0x3ba00477 for Cortex-M3 r1p2 (on Fury, DustDevil)
-# CPU TAP ID 0x4ba00477 for Cortex-M3 r2p0 (on Tempest)
+# CPU TAP ID 0x4ba00477 for Cortex-M3 r2p0 (on Tempest, Firestorm)
+# CPU TAP ID 0x4ba00477 for Cortex-M4 r0p1 (on Blizzard)
# ... we'll ignore the JTAG version field, rather than list every
# chip revision that turns up.
-if { [info exists CPUTAPID ] } {
+if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x0ba00477
swj_newdap $_CHIPNAME cpu -irlen 4 -irmask 0xf \
-expected-id $_CPUTAPID -ignore-version
-if { [info exists WORKAREASIZE ] } {
+if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
- # default to 8K working area
- set _WORKAREASIZE 0x2000
+ # default to 2K working area
+ set _WORKAREASIZE 0x800
}
set _TARGETNAME $_CHIPNAME.cpu
# 8K working area at base of ram, not backed up
#
-# NOTE: you may need or want to reconfigure the work area;
+# NOTE: you may need or want to reconfigure the work area;
# some parts have just 6K, and you may want to use other
# addresses (at end of mem not beginning) or back it up.
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
# JTAG speed ... slow enough to work with a 12 MHz RC oscillator;
# LM3S parts don't support RTCK
#
-# NOTE: this may be increased by a reset-init handler, after it
+# NOTE: this may be increased by a reset-init handler, after it
# configures and enables the PLL. Or you might need to decrease
# this, if you're using a slower clock.
adapter_khz 500
$_TARGETNAME configure -event reset-start {
adapter_khz 500
- #
+ #
# When nRST is asserted on most Stellaris devices, it clears some of
# the debug state. The ARMv7M and Cortex-M3 TRMs say that's wrong;
# and OpenOCD depends on those TRMs. So we won't use SRST on those