X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;ds=sidebyside;f=src%2Ftarget%2Farm7tdmi.c;h=d8d5e57ed0f6c9f218ebcf16b61586c3d2dad154;hb=02bbe4147d5fd460d6134d9d1d7b0cc279d68625;hp=5dc2f207990e42ccf80cbd979b4c2e90b5fffd0f;hpb=22bc5194ae101282cf5c30d681d7f4720bec2534;p=openocd.git

diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c
index 5dc2f20799..d8d5e57ed0 100644
--- a/src/target/arm7tdmi.c
+++ b/src/target/arm7tdmi.c
@@ -49,7 +49,7 @@ int arm7tdmi_init_target(struct command_context_s *cmd_ctx, struct target_s *tar
 int arm7tdmi_quit();
 
 /* target function declarations */
-enum target_state arm7tdmi_poll(struct target_s *target);
+int arm7tdmi_poll(struct target_s *target);
 int arm7tdmi_halt(target_t *target);
 		
 target_type_t arm7tdmi_target =
@@ -59,6 +59,8 @@ target_type_t arm7tdmi_target =
 	.poll = arm7_9_poll,
 	.arch_state = armv4_5_arch_state,
 
+	.target_request_data = arm7_9_target_request_data,
+
 	.halt = arm7_9_halt,
 	.resume = arm7_9_resume,
 	.step = arm7_9_step,
@@ -73,7 +75,8 @@ target_type_t arm7tdmi_target =
 	.read_memory = arm7_9_read_memory,
 	.write_memory = arm7_9_write_memory,
 	.bulk_write_memory = arm7_9_bulk_write_memory,
-
+	.checksum_memory = arm7_9_checksum_memory,
+	
 	.run_algorithm = armv4_5_run_algorithm,
 	
 	.add_breakpoint = arm7_9_add_breakpoint,
@@ -126,7 +129,7 @@ int arm7tdmi_examine_debug_reason(target_t *target)
 		arm_jtag_scann(&arm7_9->jtag_info, 0x1);
 		arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL);
 
-		jtag_add_dr_scan(2, fields, TAP_PD, NULL);
+		jtag_add_dr_scan(2, fields, TAP_PD);
 		jtag_execute_queue();
 		
 		fields[0].in_value = NULL;
@@ -134,7 +137,7 @@ int arm7tdmi_examine_debug_reason(target_t *target)
 		fields[1].in_value = NULL;
 		fields[1].out_value = databus;
 		
-		jtag_add_dr_scan(2, fields, TAP_PD, NULL);
+		jtag_add_dr_scan(2, fields, TAP_PD);
 
 		if (breakpoint & 1)
 			target->debug_reason = DBG_REASON_WATCHPOINT; 
@@ -187,7 +190,7 @@ int arm7tdmi_clock_out(arm_jtag_t *jtag_info, u32 out, u32 *in, int breakpoint)
 	fields[1].in_check_value = NULL;
 	fields[1].in_check_mask = NULL;
 
-	jtag_add_dr_scan(2, fields, -1, NULL);
+	jtag_add_dr_scan(2, fields, -1);
 
 	jtag_add_runtest(0, -1);
 	
@@ -236,7 +239,7 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
 	fields[1].in_check_value = NULL;
 	fields[1].in_check_mask = NULL;
 
-	jtag_add_dr_scan(2, fields, -1, NULL);
+	jtag_add_dr_scan(2, fields, -1);
 
 	jtag_add_runtest(0, -1);
 	
@@ -301,7 +304,7 @@ int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
 	fields[1].in_check_value = NULL;
 	fields[1].in_check_mask = NULL;
 
-	jtag_add_dr_scan(2, fields, -1, NULL);
+	jtag_add_dr_scan(2, fields, -1);
 
 	jtag_add_runtest(0, -1);
 	
@@ -744,10 +747,10 @@ void arm7tdmi_build_reg_cache(target_t *target)
 	(*cache_p)->next = embeddedice_build_reg_cache(target, arm7_9);
 	arm7_9->eice_cache = (*cache_p)->next;
 	
-	if (arm7_9->has_etm)
+	if (arm7_9->etm_ctx)
 	{
-		(*cache_p)->next->next = etm_build_reg_cache(target, jtag_info, 0);
-		arm7_9->etm_cache = (*cache_p)->next->next;
+		(*cache_p)->next->next = etm_build_reg_cache(target, jtag_info, arm7_9->etm_ctx);
+		arm7_9->etm_ctx->reg_cache = (*cache_p)->next->next;
 	}
 }
 
@@ -811,8 +814,8 @@ int arm7tdmi_init_arch_info(target_t *target, arm7tdmi_common_t *arm7tdmi, int c
 	arm7_9->post_restore_context = NULL;
 	
 	/* initialize arch-specific breakpoint handling */
-	buf_set_u32((u8*)(&arm7_9->arm_bkpt), 0, 32, 0xdeeedeee);
-	buf_set_u32((u8*)(&arm7_9->thumb_bkpt), 0, 16, 0xdeee);
+	arm7_9->arm_bkpt = 0xdeeedeee;
+	arm7_9->thumb_bkpt = 0xdeee;
 	
 	arm7_9->sw_bkpts_use_wp = 1;
 	arm7_9->sw_bkpts_enabled = 0;