X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;ds=sidebyside;f=src%2Ftarget%2Farm_disassembler.h;h=774dd2c2f968105f13efa85864815bae8b31aff0;hb=1d4a09c2ef22dc10ec8a40183b8dd1b1102af20d;hp=e7e3e95a2e05b37a225949b4852bf4e0bfba77d9;hpb=f9e091a2d3841d4b5e2f49f3b4337261974b2f2c;p=openocd.git

diff --git a/src/target/arm_disassembler.h b/src/target/arm_disassembler.h
index e7e3e95a2e..774dd2c2f9 100644
--- a/src/target/arm_disassembler.h
+++ b/src/target/arm_disassembler.h
@@ -152,7 +152,7 @@ struct arm_data_proc_instr
 	union arm_shifter_operand shifter_operand;
 };
 
-typedef struct arm_load_store_instr_s
+struct arm_load_store_instr
 {
 	uint8_t Rd;
 	uint8_t Rn;
@@ -168,18 +168,18 @@ typedef struct arm_load_store_instr_s
 			uint8_t shift_imm;
 		} reg;
 	} offset;
-} arm_load_store_instr_t;
+};
 
-typedef struct arm_load_store_multiple_instr_s
+struct arm_load_store_multiple_instr
 {
 	uint8_t Rn;
 	uint32_t register_list;
 	uint8_t addressing_mode; /* 0: IA, 1: IB, 2: DA, 3: DB */
 	uint8_t S;
 	uint8_t W;
-} arm_load_store_multiple_instr_t;
+};
 
-typedef struct arm_instruction_s
+struct arm_instruction
 {
 	enum arm_instruction_type type;
 	char text[128];
@@ -191,19 +191,19 @@ typedef struct arm_instruction_s
 	union {
 		struct arm_b_bl_bx_blx_instr b_bl_bx_blx;
 		struct arm_data_proc_instr data_proc;
-		arm_load_store_instr_t load_store;
-		arm_load_store_multiple_instr_t load_store_multiple;
+		struct arm_load_store_instr load_store;
+		struct arm_load_store_multiple_instr load_store_multiple;
 	} info;
 
-} arm_instruction_t;
+};
 
 int arm_evaluate_opcode(uint32_t opcode, uint32_t address,
-		arm_instruction_t *instruction);
+		struct arm_instruction *instruction);
 int thumb_evaluate_opcode(uint16_t opcode, uint32_t address,
-		arm_instruction_t *instruction);
-int thumb2_opcode(target_t *target, uint32_t address,
-		arm_instruction_t *instruction);
-int arm_access_size(arm_instruction_t *instruction);
+		struct arm_instruction *instruction);
+int thumb2_opcode(struct target *target, uint32_t address,
+		struct arm_instruction *instruction);
+int arm_access_size(struct arm_instruction *instruction);
 
 #define COND(opcode) (arm_condition_strings[(opcode & 0xf0000000) >> 28])