X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;ds=sidebyside;f=src%2Ftarget%2Fmips_ejtag.c;h=2a16193f887e3aa28760cd838a7f416bd72fd6cb;hb=5387d616a3d1b4550f9acecda26ead380d37dedf;hp=6d51c56f02671fd69061aa21122e6e470219bf76;hpb=13f6c889ab9b6e5b1c4f48fca9807fdc1fb83f42;p=openocd.git

diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index 6d51c56f02..2a16193f88 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -292,8 +292,8 @@ error:
 
 int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info)
 {
-	uint32_t instr = MIPS32_DRET;
-	struct pracc_queue_info ctx = {.max_code = 1, .pracc_list = &instr, .code_count = 1, .store_count = 0};
+	uint32_t pracc_list[] = {MIPS32_DRET, 0};
+	struct pracc_queue_info ctx = {.max_code = 1, .pracc_list = pracc_list, .code_count = 1, .store_count = 0};
 
 	/* execute our dret instruction */
 	ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, NULL);
@@ -341,6 +341,53 @@ static void mips_ejtag_init_mmr(struct mips_ejtag *ejtag_info)
 	}
 }
 
+static void ejtag_v20_print_imp(struct mips_ejtag *ejtag_info)
+{
+	LOG_DEBUG("EJTAG v2.0: features:%s%s%s%s%s%s%s%s",
+		EJTAG_IMP_HAS(EJTAG_V20_IMP_SDBBP) ? " SDBBP_SPECIAL2" : " SDBBP",
+		EJTAG_IMP_HAS(EJTAG_V20_IMP_EADDR_NO32BIT) ? " EADDR>32bit" : " EADDR=32bit",
+		EJTAG_IMP_HAS(EJTAG_V20_IMP_COMPLEX_BREAK) ? " COMPLEX_BREAK" : "",
+		EJTAG_IMP_HAS(EJTAG_V20_IMP_DCACHE_COH) ? " DCACHE_COH" : " DCACHE_NOT_COH",
+		EJTAG_IMP_HAS(EJTAG_V20_IMP_ICACHE_COH) ? " ICACHE_COH" : " ICACHE_NOT_COH",
+		EJTAG_IMP_HAS(EJTAG_V20_IMP_NOPB) ? " noPB" : " PB",
+		EJTAG_IMP_HAS(EJTAG_V20_IMP_NODB) ? " noDB" : " DB",
+		EJTAG_IMP_HAS(EJTAG_V20_IMP_NOIB) ? " noIB" : " IB");
+	LOG_DEBUG("EJTAG v2.0: Break Channels: %" PRIu8,
+		(uint8_t)((ejtag_info->impcode >> EJTAG_V20_IMP_BCHANNELS_SHIFT) &
+		EJTAG_V20_IMP_BCHANNELS_MASK));
+}
+
+static void ejtag_v26_print_imp(struct mips_ejtag *ejtag_info)
+{
+	LOG_DEBUG("EJTAG v2.6: features:%s%s",
+		EJTAG_IMP_HAS(EJTAG_V26_IMP_R3K) ? " R3k" : " R4k",
+		EJTAG_IMP_HAS(EJTAG_V26_IMP_DINT) ? " DINT" : "");
+}
+
+static void ejtag_main_print_imp(struct mips_ejtag *ejtag_info)
+{
+	LOG_DEBUG("EJTAG main: features:%s%s%s%s%s",
+		EJTAG_IMP_HAS(EJTAG_IMP_ASID8) ? " ASID_8" : "",
+		EJTAG_IMP_HAS(EJTAG_IMP_ASID6) ? " ASID_6" : "",
+		EJTAG_IMP_HAS(EJTAG_IMP_MIPS16) ? " MIPS16" : "",
+		EJTAG_IMP_HAS(EJTAG_IMP_NODMA) ? " noDMA" : " DMA",
+		EJTAG_IMP_HAS(EJTAG_DCR_MIPS64) ? " MIPS64" : " MIPS32");
+
+	switch (ejtag_info->ejtag_version) {
+		case EJTAG_VERSION_20:
+			ejtag_v20_print_imp(ejtag_info);
+			break;
+		case EJTAG_VERSION_25:
+		case EJTAG_VERSION_26:
+		case EJTAG_VERSION_31:
+		case EJTAG_VERSION_41:
+		case EJTAG_VERSION_51:
+			ejtag_v26_print_imp(ejtag_info);
+			break;
+		default:
+			break;
+	}
+}
 
 int mips_ejtag_init(struct mips_ejtag *ejtag_info)
 {
@@ -377,20 +424,19 @@ int mips_ejtag_init(struct mips_ejtag *ejtag_info)
 			LOG_DEBUG("EJTAG: Unknown Version Detected");
 			break;
 	}
-	LOG_DEBUG("EJTAG: features:%s%s%s%s%s%s%s",
-		ejtag_info->impcode & EJTAG_IMP_R3K ? " R3k" : " R4k",
-		ejtag_info->impcode & EJTAG_IMP_DINT ? " DINT" : "",
-		ejtag_info->impcode & (1 << 22) ? " ASID_8" : "",
-		ejtag_info->impcode & (1 << 21) ? " ASID_6" : "",
-		ejtag_info->impcode & EJTAG_IMP_MIPS16 ? " MIPS16" : "",
-		ejtag_info->impcode & EJTAG_IMP_NODMA ? " noDMA" : " DMA",
-		ejtag_info->impcode & EJTAG_DCR_MIPS64  ? " MIPS64" : " MIPS32");
-
-	if ((ejtag_info->impcode & EJTAG_IMP_NODMA) == 0)
-		LOG_DEBUG("EJTAG: DMA Access Mode Support Enabled");
-
-	/* set initial state for ejtag control reg */
-	ejtag_info->ejtag_ctrl = EJTAG_CTRL_ROCC | EJTAG_CTRL_PRACC | EJTAG_CTRL_PROBEN | EJTAG_CTRL_SETDEV;
+	ejtag_main_print_imp(ejtag_info);
+
+	if ((ejtag_info->impcode & EJTAG_IMP_NODMA) == 0) {
+		LOG_DEBUG("EJTAG: DMA Access Mode detected. Disabling to "
+			  "workaround current broken code.");
+		ejtag_info->impcode |= EJTAG_IMP_NODMA;
+	}
+
+	ejtag_info->ejtag_ctrl = EJTAG_CTRL_PRACC | EJTAG_CTRL_PROBEN;
+
+	if (ejtag_info->ejtag_version != EJTAG_VERSION_20)
+		ejtag_info->ejtag_ctrl |= EJTAG_CTRL_ROCC | EJTAG_CTRL_SETDEV;
+
 	ejtag_info->fast_access_save = -1;
 
 	mips_ejtag_init_mmr(ejtag_info);