X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;ds=sidebyside;f=src%2Ftarget%2Fnds32_disassembler.c;h=f27aba2ccaab88ab5593fcf7423b89a628872747;hb=8795090edcf7b83e65f07941b0186c63a358c31a;hp=761086e1dd2ea0dd1c50a1e51e2f5e9a7a93b921;hpb=94d64ccaebd3df17f5873c076fc08ca97088cb1e;p=openocd.git diff --git a/src/target/nds32_disassembler.c b/src/target/nds32_disassembler.c index 761086e1dd..f27aba2cca 100644 --- a/src/target/nds32_disassembler.c +++ b/src/target/nds32_disassembler.c @@ -13,9 +13,7 @@ * GNU General Public License for more details. * * * * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. * + * along with this program. If not, see . * ***************************************************************************/ #ifdef HAVE_CONFIG_H @@ -2124,7 +2122,7 @@ static int nds32_parse_alu_2(uint32_t opcode, uint32_t address, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tMULTS64\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8, address, - opcode, (dt_val >> 1) & 0x1, instruction->info.ra, + opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra, instruction->info.rb); } break; @@ -2139,7 +2137,7 @@ static int nds32_parse_alu_2(uint32_t opcode, uint32_t address, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tMULT64\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8, address, - opcode, (dt_val >> 1) & 0x1, instruction->info.ra, + opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra, instruction->info.rb); } break; @@ -2153,7 +2151,7 @@ static int nds32_parse_alu_2(uint32_t opcode, uint32_t address, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tMADDS64\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8, address, - opcode, (dt_val >> 1) & 0x1, instruction->info.ra, + opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra, instruction->info.rb); } break; @@ -2167,7 +2165,7 @@ static int nds32_parse_alu_2(uint32_t opcode, uint32_t address, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tMADD64\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8, address, - opcode, (dt_val >> 1) & 0x1, instruction->info.ra, + opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra, instruction->info.rb); } break; @@ -2181,7 +2179,7 @@ static int nds32_parse_alu_2(uint32_t opcode, uint32_t address, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tMSUBS64\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8, address, - opcode, (dt_val >> 1) & 0x1, instruction->info.ra, + opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra, instruction->info.rb); } break; @@ -2195,7 +2193,7 @@ static int nds32_parse_alu_2(uint32_t opcode, uint32_t address, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tMSUB64\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8, address, - opcode, (dt_val >> 1) & 0x1, instruction->info.ra, + opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra, instruction->info.rb); } break; @@ -2209,7 +2207,7 @@ static int nds32_parse_alu_2(uint32_t opcode, uint32_t address, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tDIVS\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8, address, - opcode, (dt_val >> 1) & 0x1, instruction->info.ra, + opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra, instruction->info.rb); } break; @@ -2223,7 +2221,7 @@ static int nds32_parse_alu_2(uint32_t opcode, uint32_t address, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tDIV\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8, address, - opcode, (dt_val >> 1) & 0x1, instruction->info.ra, + opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra, instruction->info.rb); } break; @@ -2237,7 +2235,7 @@ static int nds32_parse_alu_2(uint32_t opcode, uint32_t address, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tMULT32\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8, address, - opcode, (dt_val >> 1) & 0x1, instruction->info.ra, + opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra, instruction->info.rb); } break; @@ -2251,7 +2249,7 @@ static int nds32_parse_alu_2(uint32_t opcode, uint32_t address, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tMADD32\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8, address, - opcode, (dt_val >> 1) & 0x1, instruction->info.ra, + opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra, instruction->info.rb); } break; @@ -2265,7 +2263,7 @@ static int nds32_parse_alu_2(uint32_t opcode, uint32_t address, "0x%8.8" PRIx32 "\t0x%8.8" PRIx32 "\tMSUB32\t$D%" PRIu8 ",$r%" PRIu8 ",$r%" PRIu8, address, - opcode, (dt_val >> 1) & 0x1, instruction->info.ra, + opcode, (uint8_t)((dt_val >> 1) & 0x1), instruction->info.ra, instruction->info.rb); } break; @@ -3546,7 +3544,7 @@ static int nds32_parse_group_3_insn_16(struct nds32 *nds32, uint16_t opcode, "0x%8.8" PRIx32 "\t0x%4.4" PRIx16 "\t\tBREAK16\t#%" PRId16, address, - opcode, opcode & 0x1F); + opcode, (int16_t)(opcode & 0x1F)); } else { /* EX9.IT */ instruction->type = NDS32_INSN_MISC; /* TODO: implement real instruction semantics */ @@ -3555,7 +3553,7 @@ static int nds32_parse_group_3_insn_16(struct nds32 *nds32, uint16_t opcode, "0x%8.8" PRIx32 "\t0x%4.4" PRIx16 "\t\tEX9.IT\t#%" PRId16, address, - opcode, opcode & 0x1FF); + opcode, (int16_t)(opcode & 0x1FF)); } break; case 2: /* ADDI10S */