X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=doc%2Fopenocd.texi;h=d311c8eee4c9589175dd9450313356df807ea90d;hb=f7e0f3c285e9b1578184da886792e02d253ea687;hp=da2782b133895b10aa28c7d567589e03b406942f;hpb=ae1c64706a6fa421b60884e23561f39016950f54;p=openocd.git

diff --git a/doc/openocd.texi b/doc/openocd.texi
index da2782b133..d311c8eee4 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -21,7 +21,7 @@ of the Open On-Chip Debugger (OpenOCD).
 @itemize @bullet
 @item Copyright @copyright{} 2008 The OpenOCD Project
 @item Copyright @copyright{} 2007-2008 Spencer Oliver @email{spen@@spen-soft.co.uk}
-@item Copyright @copyright{} 2008 Oyvind Harboe @email{oyvind.harboe@@zylin.com}
+@item Copyright @copyright{} 2008-2010 Oyvind Harboe @email{oyvind.harboe@@zylin.com}
 @item Copyright @copyright{} 2008 Duane Ellis @email{openocd@@duaneellis.com}
 @item Copyright @copyright{} 2009-2010 David Brownell
 @end itemize
@@ -332,7 +332,7 @@ and one can be used for a UART adapter at the same time the
 other one is used to provide a debug adapter.
 
 Also, some development boards integrate an FT2232 chip to serve as
-a built-in low coast debug adapter and usb-to-serial solution.
+a built-in low cost debug adapter and usb-to-serial solution.
 
 @itemize @bullet
 @item @b{usbjtag}
@@ -2093,12 +2093,12 @@ target.
 @end deffn
 
 @deffn Command {interface_list}
-List the interface drivers that have been built into
+List the debug adapter drivers that have been built into
 the running copy of OpenOCD.
 @end deffn
 
-@deffn Command {jtag interface}
-Returns the name of the interface driver being used.
+@deffn Command {adapter_name}
+Returns the name of the debug adapter driver being used.
 @end deffn
 
 @section Interface Drivers
@@ -3784,7 +3784,8 @@ proc my_attach_proc @{ @} @{
 mychip.cpu configure -event gdb-attach my_attach_proc
 mychip.cpu configure -event gdb-attach @{
     echo "Reset..."
-    reset halt
+    # To make flash probe and gdb load to flash work we need a reset init.
+    reset init
 @}
 @end example
 
@@ -3804,7 +3805,11 @@ The following target events are defined:
 @* Currently not used (goal: when JTAG examine starts)
 @end ignore
 @item @b{gdb-attach}
-@* When GDB connects
+@* When GDB connects. This is before any communication with the target, so this 
+can be used to set up the target so it is possible to probe flash. Probing flash
+is necessary during gdb connect if gdb load is to write the image to flash. Another
+use of the flash memory map is for GDB to automatically hardware/software breakpoints
+depending on whether the breakpoint is in RAM or read only memory.
 @item @b{gdb-detach}
 @* When GDB disconnects
 @item @b{gdb-end}
@@ -4038,7 +4043,7 @@ specifies "to the end of the flash bank".
 The @var{num} parameter is a value shown by @command{flash banks}.
 @end deffn
 
-@deffn Command {flash erase_address} [@option{pad}] address length
+@deffn Command {flash erase_address} [@option{pad}] [@option{unlock}] address length
 Erase sectors starting at @var{address} for @var{length} bytes.
 Unless @option{pad} is specified, @math{address} must begin a
 flash sector, and @math{address + length - 1} must end a sector.
@@ -4048,6 +4053,8 @@ The flash bank to use is inferred from the @var{address}, and
 the specified length must stay within that bank.
 As a special case, when @var{length} is zero and @var{address} is
 the start of the bank, the whole flash is erased.
+If @option{unlock} is specified, then the flash is unprotected
+before erase starts. 
 @end deffn
 
 @deffn Command {flash fillw} address word length
@@ -4180,8 +4187,8 @@ To configure two adjacent banks of 16 MBytes each, both sixteen bits (two bytes)
 wide on a sixteen bit bus:
 
 @example
-flash bank cfi 0x00000000 0x01000000 2 2 $_TARGETNAME
-flash bank cfi 0x01000000 0x01000000 2 2 $_TARGETNAME
+flash bank $_FLASHNAME cfi 0x00000000 0x01000000 2 2 $_TARGETNAME
+flash bank $_FLASHNAME cfi 0x01000000 0x01000000 2 2 $_TARGETNAME
 @end example
 
 To configure one bank of 32 MBytes
@@ -4189,7 +4196,7 @@ built from two sixteen bit (two byte) wide parts wired in parallel
 to create a thirty-two bit (four byte) bus with doubled throughput:
 
 @example
-flash bank cfi 0x00000000 0x02000000 2 4 $_TARGETNAME
+flash bank $_FLASHNAME cfi 0x00000000 0x02000000 2 4 $_TARGETNAME
 @end example
 
 @c "cfi part_id" disabled
@@ -4205,7 +4212,7 @@ The setup command only requires the @var{target} argument
 since all devices in this family have the same memory layout.
 
 @example
-flash bank aduc702x 0 0 0 0 $_TARGETNAME
+flash bank $_FLASHNAME aduc702x 0 0 0 0 $_TARGETNAME
 @end example
 @end deffn
 
@@ -4226,9 +4233,9 @@ the following fixed locations:
 
 @example
 # Flash bank 0 - all chips
-flash bank at91sam3 0x00080000 0 1 1 $_TARGETNAME
+flash bank $_FLASHNAME at91sam3 0x00080000 0 1 1 $_TARGETNAME
 # Flash bank 1 - only 256K chips
-flash bank at91sam3 0x00100000 0 1 1 $_TARGETNAME
+flash bank $_FLASHNAME at91sam3 0x00100000 0 1 1 $_TARGETNAME
 @end example
 
 Internally, the AT91SAM3 flash memory is organized as follows.
@@ -4280,7 +4287,7 @@ recognizes a number of these chips using the chip identification
 register, and autoconfigures itself.
 
 @example
-flash bank at91sam7 0 0 0 0 $_TARGETNAME
+flash bank $_FLASHNAME at91sam7 0 0 0 0 $_TARGETNAME
 @end example
 
 For chips which are not recognized by the controller driver, you must
@@ -4367,7 +4374,7 @@ with most tool chains @command{verify_image} will fail.
 LPC flashes don't require the chip and bus width to be specified.
 
 @example
-flash bank lpc2000 0x0 0x7d000 0 0 $_TARGETNAME \
+flash bank $_FLASHNAME lpc2000 0x0 0x7d000 0 0 $_TARGETNAME \
       lpc2000_v2 14765 calc_checksum
 @end example
 
@@ -4385,7 +4392,7 @@ the programming clock rate in Hz.
 LPC flashes don't require the chip and bus width to be specified.
 
 @example
-flash bank lpc288x 0 0 0 0 $_TARGETNAME 12000000
+flash bank $_FLASHNAME lpc288x 0 0 0 0 $_TARGETNAME 12000000
 @end example
 @end deffn
 
@@ -4418,7 +4425,7 @@ and not by the standard @code{flash protect} command.
 
 Example for a 125 MHz clock frequency:
 @example
-flash bank lpc2900 0 0 0 0 $_TARGETNAME 125000
+flash bank $_FLASHNAME lpc2900 0 0 0 0 $_TARGETNAME 125000
 @end example
 
 Some @code{lpc2900}-specific commands are defined. In the following command list,
@@ -4516,7 +4523,7 @@ lpc2900 secure_jtag 0
 @emph{No idea what this is, other than using some arm7/arm9 core.}
 
 @example
-flash bank ocl 0 0 0 0 $_TARGETNAME
+flash bank $_FLASHNAME ocl 0 0 0 0 $_TARGETNAME
 @end example
 @end deffn
 
@@ -4525,8 +4532,8 @@ The PIC32MX microcontrollers are based on the MIPS 4K cores,
 and integrate flash memory.
 
 @example
-flash bank pix32mx 0x1fc00000 0 0 0 $_TARGETNAME
-flash bank pix32mx 0x1d000000 0 0 0 $_TARGETNAME
+flash bank $_FLASHNAME pix32mx 0x1fc00000 0 0 0 $_TARGETNAME
+flash bank $_FLASHNAME pix32mx 0x1d000000 0 0 0 $_TARGETNAME
 @end example
 
 @comment numerous *disabled* commands are defined:
@@ -4555,7 +4562,7 @@ That seems pointless since the same effect can be had using the
 standard @command{flash erase_address} command.}
 
 @example
-flash bank stellaris 0 0 0 0 $_TARGETNAME
+flash bank $_FLASHNAME stellaris 0 0 0 0 $_TARGETNAME
 @end example
 @end deffn
 
@@ -4581,7 +4588,7 @@ The driver automatically recognizes a number of these chips using
 the chip identification register, and autoconfigures itself.
 
 @example
-flash bank stm32x 0 0 0 0 $_TARGETNAME
+flash bank $_FLASHNAME stm32x 0 0 0 0 $_TARGETNAME
 @end example
 
 Some stm32x-specific commands
@@ -4619,7 +4626,7 @@ The @var{str7x} driver defines one mandatory parameter, @var{variant},
 which is either @code{STR71x}, @code{STR73x} or @code{STR75x}.
 
 @example
-flash bank str7x 0x40000000 0x00040000 0 0 $_TARGETNAME STR71x
+flash bank $_FLASHNAME str7x 0x40000000 0x00040000 0 0 $_TARGETNAME STR71x
 @end example
 
 @deffn Command {str7x disable_jtag} bank
@@ -4635,7 +4642,7 @@ The str9 needs the flash controller to be configured using
 the @command{str9x flash_config} command prior to Flash programming.
 
 @example
-flash bank str9x 0x40000000 0x00040000 0 0 $_TARGETNAME
+flash bank $_FLASHNAME str9x 0x40000000 0x00040000 0 0 $_TARGETNAME
 str9x flash_config 0 4 2 0 0x80000
 @end example
 
@@ -4785,13 +4792,13 @@ Currently, the mflash driver supports s3c2440 and pxa270.
 Example for s3c2440 mflash where @var{RST pin} is GPIO B1:
 
 @example
-mflash bank s3c2440 0x10000000 1b 0
+mflash bank $_FLASHNAME s3c2440 0x10000000 1b 0
 @end example
 
 Example for pxa270 mflash where @var{RST pin} is GPIO 43:
 
 @example
-mflash bank pxa270 0x08000000 43 0
+mflash bank $_FLASHNAME pxa270 0x08000000 43 0
 @end example
 @end deffn
 
@@ -5666,10 +5673,20 @@ separately.
 @end deffn
 
 @anchor{load_image}
-@deffn Command {load_image} filename address [@option{bin}|@option{ihex}|@option{elf}]
-Load image from file @var{filename} to target memory at @var{address}.
+@deffn Command {load_image} filename address [[@option{bin}|@option{ihex}|@option{elf}] @option{min_addr} @option{max_length}]
+Load image from file @var{filename} to target memory offset by @var{address} from its load address. 
 The file format may optionally be specified
-(@option{bin}, @option{ihex}, or @option{elf})
+(@option{bin}, @option{ihex}, or @option{elf}).
+In addition the following arguments may be specifed:
+@var{min_addr} - ignore data below @var{min_addr} (this is w.r.t. to the target's load address + @var{address})
+@var{max_length} - maximum number of bytes to load.
+@example
+proc load_image_bin @{fname foffset address length @} @{
+    # Load data from fname filename at foffset offset to
+    # target at address. Load at most length bytes.
+    load_image $fname [expr $address - $foffset] bin $address $length      
+@}
+@end example
 @end deffn
 
 @deffn Command {test_image} filename [address [@option{bin}|@option{ihex}|@option{elf}]]
@@ -7406,8 +7423,8 @@ has closed the connection to OpenOCD. This might be a GDB issue.
 
 @item @b{LPC2000 Flash} In the configuration file in the section where flash device configurations
 are described, there is a parameter for specifying the clock frequency
-for LPC2000 internal flash devices (e.g.  @option{flash bank lpc2000
-0x0 0x40000 0 0 0 lpc2000_v1 14746 calc_checksum}), which must be
+for LPC2000 internal flash devices (e.g.  @option{flash bank $_FLASHNAME lpc2000
+0x0 0x40000 0 0 $_TARGETNAME lpc2000_v1 14746 calc_checksum}), which must be
 specified in kilohertz. However, I do have a quartz crystal of a
 frequency that contains fractions of kilohertz (e.g. 14,745,600 Hz,
 i.e. 14,745.600 kHz).  Is it possible to specify real numbers for the