X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fflash%2Fat91sam7.c;h=99a8a9af9b74215d4b585c48c97f9a0b4d3c1d27;hb=a6d6a94c9dd3708eec2f980d42f1b1f0e155b61f;hp=907302eb2b75f15de3b56ffbe219b326f592e4ca;hpb=9c999216b1601d762d4928b201bc7a9d8778f2aa;p=openocd.git diff --git a/src/flash/at91sam7.c b/src/flash/at91sam7.c index 907302eb2b..99a8a9af9b 100644 --- a/src/flash/at91sam7.c +++ b/src/flash/at91sam7.c @@ -1,21 +1,21 @@ /*************************************************************************** - * Copyright (C) 2006 by Magnus Lundin * - * lundin@mlu.mine.nu * - * * - * This program is free software; you can redistribute it and/or modify * - * it under the terms of the GNU General Public License as published by * - * the Free Software Foundation; either version 2 of the License, or * - * (at your option) any later version. * - * * - * This program is distributed in the hope that it will be useful, * - * but WITHOUT ANY WARRANTY; without even the implied warranty of * - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * - * GNU General Public License for more details. * - * * + * Copyright (C) 2006 by Magnus Lundin * + * lundin@mlu.mine.nu * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * ***************************************************************************/ /*************************************************************************** @@ -57,6 +57,7 @@ int at91sam7_erase(struct flash_bank_s *bank, int first, int last); int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int last); int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count); int at91sam7_probe(struct flash_bank_s *bank); +int at91sam7_auto_probe(struct flash_bank_s *bank); int at91sam7_erase_check(struct flash_bank_s *bank); int at91sam7_protect_check(struct flash_bank_s *bank); int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size); @@ -76,6 +77,7 @@ flash_driver_t at91sam7_flash = .protect = at91sam7_protect, .write = at91sam7_write, .probe = at91sam7_probe, + .auto_probe = at91sam7_auto_probe, .erase_check = at91sam7_erase_check, .protect_check = at91sam7_protect_check, .info = at91sam7_info @@ -312,11 +314,6 @@ int at91sam7_read_part_info(struct flash_bank_s *bank) u32 cidr, status; int sectornum; - if (bank->target->state != TARGET_HALTED) - { - return ERROR_TARGET_NOT_HALTED; - } - /* Read and parse chip identification register */ target_read_u32(target, DBGU_CIDR, &cidr); @@ -465,8 +462,8 @@ int at91sam7_read_part_info(struct flash_bank_s *bank) if (at91sam7_info->cidr_arch == 0x72 ) { - at91sam7_info->num_nvmbits = 2; - at91sam7_info->nvmbits = (status>>8)&0x03; + at91sam7_info->num_nvmbits = 3; + at91sam7_info->nvmbits = (status>>8)&0x07; bank->base = 0x100000; bank->bus_width = 4; if (bank->size==0x80000) /* AT91SAM7SE512 */ @@ -582,6 +579,11 @@ int at91sam7_protect_check(struct flash_bank_s *bank) at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv; + if (bank->target->state != TARGET_HALTED) + { + return ERROR_TARGET_NOT_HALTED; + } + if (at91sam7_info->cidr == 0) { at91sam7_read_part_info(bank); @@ -617,6 +619,7 @@ int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, ch at91sam7_info = malloc(sizeof(at91sam7_flash_bank_t)); bank->driver_priv = at91sam7_info; + at91sam7_info->probed = 0; /* part wasn't probed for info yet */ at91sam7_info->cidr = 0; @@ -739,7 +742,7 @@ int at91sam7_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count) { return ERROR_TARGET_NOT_HALTED; } - + if (at91sam7_info->cidr == 0) { at91sam7_read_part_info(bank); @@ -806,7 +809,13 @@ int at91sam7_probe(struct flash_bank_s *bank) * if this is an at91sam7, it has the configured flash */ at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv; + at91sam7_info->probed = 0; + if (bank->target->state != TARGET_HALTED) + { + return ERROR_TARGET_NOT_HALTED; + } + if (at91sam7_info->cidr == 0) { at91sam7_read_part_info(bank); @@ -818,14 +827,30 @@ int at91sam7_probe(struct flash_bank_s *bank) return ERROR_FLASH_OPERATION_FAILED; } + at91sam7_info->probed = 1; + return ERROR_OK; } + +int at91sam7_auto_probe(struct flash_bank_s *bank) +{ + at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv; + if (at91sam7_info->probed) + return ERROR_OK; + return at91sam7_probe(bank); +} + int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size) { int printed, flashplane; at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv; + if (bank->target->state != TARGET_HALTED) + { + return ERROR_TARGET_NOT_HALTED; + } + at91sam7_read_part_info(bank); if (at91sam7_info->cidr == 0) @@ -877,7 +902,7 @@ int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size) } /* -* On AT91SAM7S: When the gpnmv bits are set with +* On AT91SAM7S: When the gpnvm bits are set with * > at91sam7 gpnvm 0 bitnr set * the changes are not visible in the flash controller status register MC_FSR * until the processor has been reset. @@ -945,8 +970,7 @@ int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, } else { - command_print(cmd_ctx, "usage: at91sam7 gpnvm "); - return ERROR_OK; + return ERROR_COMMAND_SYNTAX_ERROR; } /* Configure the flash controller timing */