X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fflash%2Fnand%2Fcore.h;h=137298cbc8b19422d6eafb27524a8e54005f10e9;hb=5308bd991ca63e56c272af47ad6dacf7e4c75569;hp=b8dc01c76c49dd722676fae6f115df5051976f87;hpb=899c9975e750ff0144d4a4f63e0f2a619c0b0e58;p=openocd.git diff --git a/src/flash/nand/core.h b/src/flash/nand/core.h index b8dc01c76c..137298cbc8 100644 --- a/src/flash/nand/core.h +++ b/src/flash/nand/core.h @@ -1,3 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + /*************************************************************************** * Copyright (C) 2007 by Dominic Rath * * Copyright (C) 2009 Zachary T Welch * @@ -6,32 +8,17 @@ * Copyright (C) 2000 David Woodhouse * * Copyright (C) 2000 Steven J. Hill * * Copyright (C) 2000 Thomas Gleixner * - * * - * This program is free software; you can redistribute it and/or modify * - * it under the terms of the GNU General Public License as published by * - * the Free Software Foundation; either version 2 of the License, or * - * (at your option) any later version. * - * * - * This program is distributed in the hope that it will be useful, * - * but WITHOUT ANY WARRANTY; without even the implied warranty of * - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * - * GNU General Public License for more details. * - * * - * You should have received a copy of the GNU General Public License * - * along with this program; if not, write to the * - * Free Software Foundation, Inc., * - * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * ***************************************************************************/ -#ifndef FLASH_NAND_CORE_H -#define FLASH_NAND_CORE_H + +#ifndef OPENOCD_FLASH_NAND_CORE_H +#define OPENOCD_FLASH_NAND_CORE_H #include /** * Representation of a single NAND block in a NAND device. */ -struct nand_block -{ +struct nand_block { /** Offset to the block. */ uint32_t offset; @@ -57,9 +44,9 @@ struct nand_ecclayout { struct nand_oobfree oobfree[2]; }; -struct nand_device -{ - char *name; +struct nand_device { + const char *name; + struct target *target; struct nand_flash_controller *controller; void *controller_priv; struct nand_manufacturer *manufacturer; @@ -68,7 +55,7 @@ struct nand_device int address_cycles; int page_size; int erase_size; - int use_raw; + bool use_raw; int num_blocks; struct nand_block *blocks; struct nand_device *next; @@ -76,8 +63,7 @@ struct nand_device /* NAND Flash Manufacturer ID Codes */ -enum -{ +enum { NAND_MFR_TOSHIBA = 0x98, NAND_MFR_SAMSUNG = 0xec, NAND_MFR_FUJITSU = 0x04, @@ -88,23 +74,22 @@ enum NAND_MFR_MICRON = 0x2c, }; -struct nand_manufacturer -{ +struct nand_manufacturer { int id; - char *name; + const char *name; }; -struct nand_info -{ - char *name; +struct nand_info { + int mfr_id; int id; int page_size; int chip_size; int erase_size; int options; + const char *name; }; -/* Option constants for bizarre disfunctionality and real features +/* Option constants for bizarre dysfunctionality and real features */ enum { /* Chip can not auto increment pages */ @@ -150,8 +135,7 @@ enum { LP_OPTIONS16 = (LP_OPTIONS | NAND_BUSWIDTH_16), }; -enum -{ +enum { /* Standard NAND flash commands */ NAND_CMD_READ0 = 0x0, NAND_CMD_READ1 = 0x1, @@ -159,7 +143,7 @@ enum NAND_CMD_PAGEPROG = 0x10, NAND_CMD_READOOB = 0x50, NAND_CMD_ERASE1 = 0x60, - NAND_CMD_STATUS = 0x70, + NAND_CMD_STATUS = 0x70, NAND_CMD_STATUS_MULTI = 0x71, NAND_CMD_SEQIN = 0x80, NAND_CMD_RNDIN = 0x85, @@ -174,8 +158,7 @@ enum }; /* Status bits */ -enum -{ +enum { NAND_STATUS_FAIL = 0x01, NAND_STATUS_FAIL_N1 = 0x02, NAND_STATUS_TRUE_READY = 0x20, @@ -184,60 +167,58 @@ enum }; /* OOB (spare) data formats */ -enum oob_formats -{ +enum oob_formats { NAND_OOB_NONE = 0x0, /* no OOB data at all */ - NAND_OOB_RAW = 0x1, /* raw OOB data (16 bytes for 512b page sizes, 64 bytes for 2048b page sizes) */ + NAND_OOB_RAW = 0x1, /* raw OOB data (16 bytes for 512b page sizes, 64 bytes for + *2048b page sizes) */ NAND_OOB_ONLY = 0x2, /* only OOB data */ NAND_OOB_SW_ECC = 0x10, /* when writing, use SW ECC (as opposed to no ECC) */ - NAND_OOB_HW_ECC = 0x20, /* when writing, use HW ECC (as opposed to no ECC) */ - NAND_OOB_SW_ECC_KW = 0x40, /* when writing, use Marvell's Kirkwood bootrom format */ + NAND_OOB_HW_ECC = 0x20, /* when writing, use HW ECC (as opposed to no ECC) */ + NAND_OOB_SW_ECC_KW = 0x40, /* when writing, use Marvell's Kirkwood bootrom format */ NAND_OOB_JFFS2 = 0x100, /* when writing, use JFFS2 OOB layout */ NAND_OOB_YAFFS2 = 0x100,/* when writing, use YAFFS2 OOB layout */ }; - -/** - * Returns the flash bank specified by @a name, which matches the - * driver name and a suffix (option) specify the driver-specific - * bank number. The suffix consists of the '.' and the driver-specific - * bank number: when two davinci banks are defined, then 'davinci.1' refers - * to the second (e.g. DM355EVM). - */ -struct nand_device *get_nand_device_by_name(const char *name); +extern struct nand_device *nand_devices; struct nand_device *get_nand_device_by_num(int num); int nand_page_command(struct nand_device *nand, uint32_t page, - uint8_t cmd, bool oob_only); + uint8_t cmd, bool oob_only); + +int nand_read_data_page(struct nand_device *nand, uint8_t *data, uint32_t size); +int nand_write_data_page(struct nand_device *nand, + uint8_t *data, uint32_t size); + +int nand_write_finish(struct nand_device *nand); int nand_read_page_raw(struct nand_device *nand, uint32_t page, - uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size); + uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size); int nand_write_page_raw(struct nand_device *nand, uint32_t page, - uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size); + uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size); int nand_read_status(struct nand_device *nand, uint8_t *status); int nand_calculate_ecc(struct nand_device *nand, - const uint8_t *dat, uint8_t *ecc_code); + const uint8_t *dat, uint8_t *ecc_code); int nand_calculate_ecc_kw(struct nand_device *nand, - const uint8_t *dat, uint8_t *ecc_code); + const uint8_t *dat, uint8_t *ecc_code); +int nand_correct_data(struct nand_device *nand, u_char *dat, + u_char *read_ecc, u_char *calc_ecc); int nand_register_commands(struct command_context *cmd_ctx); -int nand_init(struct command_context *cmd_ctx); -/// helper for parsing a nand device command argument string +/** helper for parsing a nand device command argument string */ COMMAND_HELPER(nand_command_get_device, unsigned name_index, - struct nand_device **nand); - + struct nand_device **nand); -#define ERROR_NAND_DEVICE_INVALID (-1100) -#define ERROR_NAND_OPERATION_FAILED (-1101) -#define ERROR_NAND_OPERATION_TIMEOUT (-1102) -#define ERROR_NAND_OPERATION_NOT_SUPPORTED (-1103) -#define ERROR_NAND_DEVICE_NOT_PROBED (-1104) -#define ERROR_NAND_ERROR_CORRECTION_FAILED (-1105) -#define ERROR_NAND_NO_BUFFER (-1106) -#endif // FLASH_NAND_CORE_H +#define ERROR_NAND_DEVICE_INVALID (-1100) +#define ERROR_NAND_OPERATION_FAILED (-1101) +#define ERROR_NAND_OPERATION_TIMEOUT (-1102) +#define ERROR_NAND_OPERATION_NOT_SUPPORTED (-1103) +#define ERROR_NAND_DEVICE_NOT_PROBED (-1104) +#define ERROR_NAND_ERROR_CORRECTION_FAILED (-1105) +#define ERROR_NAND_NO_BUFFER (-1106) +#endif /* OPENOCD_FLASH_NAND_CORE_H */