X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fflash%2Fnand.h;h=230cf508056459a96dd15ff6927ed9bf6caa45f8;hb=04ee41de52065f648752c13652b3428260f1ac2a;hp=65f1589fd492b5c4143408e5ba40a577d17704ae;hpb=cb582796539d35920e918bec2d0118eb3736d40e;p=openocd.git diff --git a/src/flash/nand.h b/src/flash/nand.h index 65f1589fd4..230cf50805 100644 --- a/src/flash/nand.h +++ b/src/flash/nand.h @@ -2,12 +2,10 @@ * Copyright (C) 2007 by Dominic Rath * * Dominic.Rath@gmx.de * * * - * partially based on * - * linux/include/linux/mtd/nand.h * - * * - * Copyright (c) 2000 David Woodhouse * - * Steven J. Hill * - * Thomas Gleixner * + * Partially based on linux/include/linux/mtd/nand.h * + * Copyright (C) 2000 David Woodhouse * + * Copyright (C) 2000 Steven J. Hill * + * Copyright (C) 2000 Thomas Gleixner * * * * This program is free software; you can redistribute it and/or modify * * it under the terms of the GNU General Public License as published by * @@ -27,50 +25,116 @@ #ifndef NAND_H #define NAND_H -#include "flash.h" +#include + +struct nand_device; -struct nand_device_s; +#define __NAND_DEVICE_COMMAND(name) \ + COMMAND_HELPER(name, struct nand_device *nand) -typedef struct nand_flash_controller_s +/** + * Interface for NAND flash controllers. Not all of these functions are + * required for full functionality of the NAND driver, but better performance + * can be achieved by implementing each function. + */ +struct nand_flash_controller { + /** Driver name that is used to select it from configuration files. */ char *name; - int (*nand_device_command)(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device); - int (*register_commands)(struct command_context_s *cmd_ctx); - int (*init)(struct nand_device_s *device); - int (*reset)(struct nand_device_s *device); - int (*command)(struct nand_device_s *device, u8 command); - int (*address)(struct nand_device_s *device, u8 address); - int (*write_data)(struct nand_device_s *device, u16 data); - int (*read_data)(struct nand_device_s *device, void *data); - int (*write_page)(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size); - int (*read_page)(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size); - int (*controller_ready)(struct nand_device_s *device, int timeout); - int (*nand_ready)(struct nand_device_s *device, int timeout); -} nand_flash_controller_t; - -typedef struct nand_block_s + + const struct command_registration *commands; + + /** NAND device command called when driver is instantiated during configuration. */ + __NAND_DEVICE_COMMAND((*nand_device_command)); + + /** Register controller specific commands as a TCL interface to the driver. */ + int (*register_commands)(struct command_context *cmd_ctx); + + /** Initialize the NAND device. */ + int (*init)(struct nand_device *nand); + + /** Reset the NAND device. */ + int (*reset)(struct nand_device *nand); + + /** Issue a command to the NAND device. */ + int (*command)(struct nand_device *nand, uint8_t command); + + /** Write an address to the NAND device. */ + int (*address)(struct nand_device *nand, uint8_t address); + + /** Write word of data to the NAND device. */ + int (*write_data)(struct nand_device *nand, uint16_t data); + + /** Read word of data from the NAND device. */ + int (*read_data)(struct nand_device *nand, void *data); + + /** Write a block of data to the NAND device. */ + int (*write_block_data)(struct nand_device *nand, uint8_t *data, int size); + + /** Read a block of data from the NAND device. */ + int (*read_block_data)(struct nand_device *nand, uint8_t *data, int size); + + /** Write a page to the NAND device. */ + int (*write_page)(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size); + + /** Read a page from the NAND device. */ + int (*read_page)(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size); + + /** Check if the controller is ready for more instructions with timeout. */ + int (*controller_ready)(struct nand_device *nand, int timeout); + + /** Check if the NAND device is ready for more instructions with timeout. */ + int (*nand_ready)(struct nand_device *nand, int timeout); +}; + +#define NAND_DEVICE_COMMAND_HANDLER(name) static __NAND_DEVICE_COMMAND(name) + +/** + * Representation of a single NAND block in a NAND device. + */ +struct nand_block { - u32 offset; - u32 size; + /** Offset to the block. */ + uint32_t offset; + + /** Size of the block. */ + uint32_t size; + + /** True if the block has been erased. */ int is_erased; + + /** True if the block is bad. */ int is_bad; -} nand_block_t; +}; + +struct nand_oobfree { + int offset; + int length; +}; -typedef struct nand_device_s +struct nand_ecclayout { + int eccbytes; + int eccpos[64]; + int oobavail; + struct nand_oobfree oobfree[2]; +}; + +struct nand_device { - nand_flash_controller_t *controller; + char *name; + struct nand_flash_controller *controller; void *controller_priv; - struct nand_manufacturer_s *manufacturer; - struct nand_info_s *device; + struct nand_manufacturer *manufacturer; + struct nand_info *device; int bus_width; int address_cycles; int page_size; int erase_size; int use_raw; int num_blocks; - nand_block_t *blocks; - struct nand_device_s *next; -} nand_device_t; + struct nand_block *blocks; + struct nand_device *next; +}; /* NAND Flash Manufacturer ID Codes */ @@ -83,15 +147,16 @@ enum NAND_MFR_RENESAS = 0x07, NAND_MFR_STMICRO = 0x20, NAND_MFR_HYNIX = 0xad, + NAND_MFR_MICRON = 0x2c, }; -typedef struct nand_manufacturer_s +struct nand_manufacturer { - int id; + int id; char *name; -} nand_manufacturer_t; +}; -typedef struct nand_info_s +struct nand_info { char *name; int id; @@ -99,47 +164,47 @@ typedef struct nand_info_s int chip_size; int erase_size; int options; -} nand_info_t; +}; /* Option constants for bizarre disfunctionality and real features */ -enum { +enum { /* Chip can not auto increment pages */ NAND_NO_AUTOINCR = 0x00000001, - + /* Buswitdh is 16 bit */ NAND_BUSWIDTH_16 = 0x00000002, - + /* Device supports partial programming without padding */ NAND_NO_PADDING = 0x00000004, - + /* Chip has cache program function */ NAND_CACHEPRG = 0x00000008, - + /* Chip has copy back function */ NAND_COPYBACK = 0x00000010, - + /* AND Chip which has 4 banks and a confusing page / block * assignment. See Renesas datasheet for further information */ NAND_IS_AND = 0x00000020, - + /* Chip has a array of 4 pages which can be read without * additional ready /busy waits */ NAND_4PAGE_ARRAY = 0x00000040, - + /* Chip requires that BBT is periodically rewritten to prevent * bits from adjacent blocks from 'leaking' in altering data. * This happens with the Renesas AG-AND chips, possibly others. */ BBT_AUTO_REFRESH = 0x00000080, - + /* Chip does not require ready check on read. True * for all large page devices, as they do not support * autoincrement.*/ NAND_NO_READRDY = 0x00000100, - + /* Options valid for Samsung large page devices */ NAND_SAMSUNG_LP_OPTIONS = (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK), - + /* Options for new chips with large page size. The pagesize and the * erasesize is determined from the extended id bytes */ @@ -163,7 +228,7 @@ enum NAND_CMD_READID = 0x90, NAND_CMD_ERASE2 = 0xd0, NAND_CMD_RESET = 0xff, - + /* Extended commands for large page devices */ NAND_CMD_READSTART = 0x30, NAND_CMD_RNDOUTSTART = 0xE0, @@ -186,16 +251,47 @@ enum oob_formats NAND_OOB_NONE = 0x0, /* no OOB data at all */ NAND_OOB_RAW = 0x1, /* raw OOB data (16 bytes for 512b page sizes, 64 bytes for 2048b page sizes) */ NAND_OOB_ONLY = 0x2, /* only OOB data */ - NAND_OOB_SW_ECC = 0x10, /* when writing, use SW ECC (as opposed to no ECC) */ + NAND_OOB_SW_ECC = 0x10, /* when writing, use SW ECC (as opposed to no ECC) */ NAND_OOB_HW_ECC = 0x20, /* when writing, use HW ECC (as opposed to no ECC) */ + NAND_OOB_SW_ECC_KW = 0x40, /* when writing, use Marvell's Kirkwood bootrom format */ NAND_OOB_JFFS2 = 0x100, /* when writing, use JFFS2 OOB layout */ NAND_OOB_YAFFS2 = 0x100,/* when writing, use YAFFS2 OOB layout */ }; -/* Function prototypes */ -extern nand_device_t *get_nand_device_by_num(int num); -extern int nand_read_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size); -extern int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, u32 data_size, u8 *oob, u32 oob_size); + +/** + * Returns the flash bank specified by @a name, which matches the + * driver name and a suffix (option) specify the driver-specific + * bank number. The suffix consists of the '.' and the driver-specific + * bank number: when two davinci banks are defined, then 'davinci.1' refers + * to the second (e.g. DM355EVM). + */ +struct nand_device *get_nand_device_by_name(const char *name); + +struct nand_device *get_nand_device_by_num(int num); + +int nand_page_command(struct nand_device *nand, uint32_t page, + uint8_t cmd, bool oob_only); + +int nand_read_page_raw(struct nand_device *nand, uint32_t page, + uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size); +int nand_write_page_raw(struct nand_device *nand, uint32_t page, + uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size); + +int nand_read_status(struct nand_device *nand, uint8_t *status); + +int nand_calculate_ecc(struct nand_device *nand, + const uint8_t *dat, uint8_t *ecc_code); +int nand_calculate_ecc_kw(struct nand_device *nand, + const uint8_t *dat, uint8_t *ecc_code); + +int nand_register_commands(struct command_context *cmd_ctx); +int nand_init(struct command_context *cmd_ctx); + +/// helper for parsing a nand device command argument string +COMMAND_HELPER(nand_command_get_device, unsigned name_index, + struct nand_device **nand); + #define ERROR_NAND_DEVICE_INVALID (-1100) #define ERROR_NAND_OPERATION_FAILED (-1101) @@ -203,5 +299,6 @@ extern int nand_write_page_raw(struct nand_device_s *device, u32 page, u8 *data, #define ERROR_NAND_OPERATION_NOT_SUPPORTED (-1103) #define ERROR_NAND_DEVICE_NOT_PROBED (-1104) #define ERROR_NAND_ERROR_CORRECTION_FAILED (-1105) +#define ERROR_NAND_NO_BUFFER (-1106) #endif /* NAND_H */