X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fflash%2Fnand.h;h=230cf508056459a96dd15ff6927ed9bf6caa45f8;hb=04ee41de52065f648752c13652b3428260f1ac2a;hp=af52c770970373fa911ef69118fc3698daf7cddf;hpb=664ba309d5dac2532c83fed441d14f93c7381d62;p=openocd.git diff --git a/src/flash/nand.h b/src/flash/nand.h index af52c77097..230cf50805 100644 --- a/src/flash/nand.h +++ b/src/flash/nand.h @@ -25,39 +25,85 @@ #ifndef NAND_H #define NAND_H -#include "flash.h" +#include struct nand_device; #define __NAND_DEVICE_COMMAND(name) \ COMMAND_HELPER(name, struct nand_device *nand) +/** + * Interface for NAND flash controllers. Not all of these functions are + * required for full functionality of the NAND driver, but better performance + * can be achieved by implementing each function. + */ struct nand_flash_controller { + /** Driver name that is used to select it from configuration files. */ char *name; + + const struct command_registration *commands; + + /** NAND device command called when driver is instantiated during configuration. */ __NAND_DEVICE_COMMAND((*nand_device_command)); + + /** Register controller specific commands as a TCL interface to the driver. */ int (*register_commands)(struct command_context *cmd_ctx); + + /** Initialize the NAND device. */ int (*init)(struct nand_device *nand); + + /** Reset the NAND device. */ int (*reset)(struct nand_device *nand); + + /** Issue a command to the NAND device. */ int (*command)(struct nand_device *nand, uint8_t command); + + /** Write an address to the NAND device. */ int (*address)(struct nand_device *nand, uint8_t address); + + /** Write word of data to the NAND device. */ int (*write_data)(struct nand_device *nand, uint16_t data); + + /** Read word of data from the NAND device. */ int (*read_data)(struct nand_device *nand, void *data); + + /** Write a block of data to the NAND device. */ int (*write_block_data)(struct nand_device *nand, uint8_t *data, int size); + + /** Read a block of data from the NAND device. */ int (*read_block_data)(struct nand_device *nand, uint8_t *data, int size); + + /** Write a page to the NAND device. */ int (*write_page)(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size); + + /** Read a page from the NAND device. */ int (*read_page)(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size); + + /** Check if the controller is ready for more instructions with timeout. */ int (*controller_ready)(struct nand_device *nand, int timeout); + + /** Check if the NAND device is ready for more instructions with timeout. */ int (*nand_ready)(struct nand_device *nand, int timeout); }; #define NAND_DEVICE_COMMAND_HANDLER(name) static __NAND_DEVICE_COMMAND(name) +/** + * Representation of a single NAND block in a NAND device. + */ struct nand_block { + /** Offset to the block. */ uint32_t offset; + + /** Size of the block. */ uint32_t size; + + /** True if the block has been erased. */ int is_erased; + + /** True if the block is bad. */ int is_bad; }; @@ -224,6 +270,9 @@ struct nand_device *get_nand_device_by_name(const char *name); struct nand_device *get_nand_device_by_num(int num); +int nand_page_command(struct nand_device *nand, uint32_t page, + uint8_t cmd, bool oob_only); + int nand_read_page_raw(struct nand_device *nand, uint32_t page, uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size); int nand_write_page_raw(struct nand_device *nand, uint32_t page,