X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fat91sam3.c;h=c46829eff6933ed297abccadefc3ac63bf9ce282;hb=811f7d3f7eb0a2f40406949e21d7f2ab577d2d46;hp=0b71e819d77eae5c0f0abe4937fba679d04ef810;hpb=33a17fd35995a7f679f92600055a8f55ae380022;p=openocd.git

diff --git a/src/flash/nor/at91sam3.c b/src/flash/nor/at91sam3.c
index 0b71e819d7..c46829eff6 100644
--- a/src/flash/nor/at91sam3.c
+++ b/src/flash/nor/at91sam3.c
@@ -73,6 +73,9 @@
 // at91sam3s series (has always one flash bank)
 #define FLASH_BANK_BASE_S   0x00400000
 
+// at91sam3n series (has always one flash bank)
+#define FLASH_BANK_BASE_N   0x00400000
+
 #define 	AT91C_EFC_FCMD_GETD                 (0x0) // (EFC) Get Flash Descriptor
 #define 	AT91C_EFC_FCMD_WP                   (0x1) // (EFC) Write Page
 #define 	AT91C_EFC_FCMD_WPL                  (0x2) // (EFC) Write Page and Lock
@@ -832,6 +835,440 @@ static const struct sam3_chip_details all_sam3_details[] = {
 		  },
 		},
 	},
+
+	// Start at91sam3n* series
+	{
+		.chipid_cidr    = 0x29540960,
+		.name           = "at91sam3n4c",
+		.total_flash_size     = 256 * 1024,
+		.total_sram_size      = 24 * 1024,
+		.n_gpnvms       = 3,
+		.n_banks        = 1,
+
+		// System boots at address 0x0
+		// gpnvm[1] = selects boot code
+		//     if gpnvm[1] == 0
+		//         boot is via "SAMBA" (rom)
+		//     else
+		//         boot is via FLASH
+		//         Selection is via gpnvm[2]
+		//     endif
+		//
+		// NOTE: banks 0 & 1 switch places
+		//     if gpnvm[2] == 0
+		//         Bank0 is the boot rom
+		//      else
+		//         Bank1 is the boot rom
+		//      endif
+//		.bank[0] = {
+		{
+		  {
+			.probed = 0,
+			.pChip  = NULL,
+			.pBank  = NULL,
+			.bank_number = 0,
+			.base_address = FLASH_BANK_BASE_N,
+			.controller_address = 0x400e0A00,
+			.present = 1,
+			.size_bytes = 256 * 1024,
+			.nsectors   = 16,
+			.sector_size = 16384,
+			.page_size   = 256,
+		  },
+
+//		.bank[1] = {
+		  {
+		  	.present = 0,
+			.probed = 0,
+			.bank_number = 1,
+		  },
+		},
+	},
+
+	{
+		.chipid_cidr    = 0x29440960,
+		.name           = "at91sam3n4b",
+		.total_flash_size     = 256 * 1024,
+		.total_sram_size      = 24 * 1024,
+		.n_gpnvms       = 3,
+		.n_banks        = 1,
+
+		// System boots at address 0x0
+		// gpnvm[1] = selects boot code
+		//     if gpnvm[1] == 0
+		//         boot is via "SAMBA" (rom)
+		//     else
+		//         boot is via FLASH
+		//         Selection is via gpnvm[2]
+		//     endif
+		//
+		// NOTE: banks 0 & 1 switch places
+		//     if gpnvm[2] == 0
+		//         Bank0 is the boot rom
+		//      else
+		//         Bank1 is the boot rom
+		//      endif
+//		.bank[0] = {
+		{
+		  {
+			.probed = 0,
+			.pChip  = NULL,
+			.pBank  = NULL,
+			.bank_number = 0,
+			.base_address = FLASH_BANK_BASE_N,
+			.controller_address = 0x400e0A00,
+			.present = 1,
+			.size_bytes = 256 * 1024,
+			.nsectors   = 16,
+			.sector_size = 16384,
+			.page_size   = 256,
+		  },
+
+//		.bank[1] = {
+		  {
+		  	.present = 0,
+			.probed = 0,
+			.bank_number = 1,
+		  },
+		},
+	},
+
+	{
+		.chipid_cidr    = 0x29340960,
+		.name           = "at91sam3n4a",
+		.total_flash_size     = 256 * 1024,
+		.total_sram_size      = 24 * 1024,
+		.n_gpnvms       = 3,
+		.n_banks        = 1,
+
+		// System boots at address 0x0
+		// gpnvm[1] = selects boot code
+		//     if gpnvm[1] == 0
+		//         boot is via "SAMBA" (rom)
+		//     else
+		//         boot is via FLASH
+		//         Selection is via gpnvm[2]
+		//     endif
+		//
+		// NOTE: banks 0 & 1 switch places
+		//     if gpnvm[2] == 0
+		//         Bank0 is the boot rom
+		//      else
+		//         Bank1 is the boot rom
+		//      endif
+//		.bank[0] = {
+		{
+		  {
+			.probed = 0,
+			.pChip  = NULL,
+			.pBank  = NULL,
+			.bank_number = 0,
+			.base_address = FLASH_BANK_BASE_N,
+			.controller_address = 0x400e0A00,
+			.present = 1,
+			.size_bytes = 256 * 1024,
+			.nsectors   = 16,
+			.sector_size = 16384,
+			.page_size   = 256,
+		  },
+
+//		.bank[1] = {
+		  {
+		  	.present = 0,
+			.probed = 0,
+			.bank_number = 1,
+		  },
+		},
+	},
+
+	{
+		.chipid_cidr    = 0x29590760,
+		.name           = "at91sam3n2c",
+		.total_flash_size     = 128 * 1024,
+		.total_sram_size      = 16 * 1024,
+		.n_gpnvms       = 3,
+		.n_banks        = 1,
+
+		// System boots at address 0x0
+		// gpnvm[1] = selects boot code
+		//     if gpnvm[1] == 0
+		//         boot is via "SAMBA" (rom)
+		//     else
+		//         boot is via FLASH
+		//         Selection is via gpnvm[2]
+		//     endif
+		//
+		// NOTE: banks 0 & 1 switch places
+		//     if gpnvm[2] == 0
+		//         Bank0 is the boot rom
+		//      else
+		//         Bank1 is the boot rom
+		//      endif
+//		.bank[0] = {
+		{
+		  {
+			.probed = 0,
+			.pChip  = NULL,
+			.pBank  = NULL,
+			.bank_number = 0,
+			.base_address = FLASH_BANK_BASE_N,
+			.controller_address = 0x400e0A00,
+			.present = 1,
+			.size_bytes = 128 * 1024,
+			.nsectors   = 8,
+			.sector_size = 16384,
+			.page_size   = 256,
+		  },
+
+//		.bank[1] = {
+		  {
+		  	.present = 0,
+			.probed = 0,
+			.bank_number = 1,
+		  },
+		},
+	},
+
+	{
+		.chipid_cidr    = 0x29490760,
+		.name           = "at91sam3n2b",
+		.total_flash_size     = 128 * 1024,
+		.total_sram_size      = 16 * 1024,
+		.n_gpnvms       = 3,
+		.n_banks        = 1,
+
+		// System boots at address 0x0
+		// gpnvm[1] = selects boot code
+		//     if gpnvm[1] == 0
+		//         boot is via "SAMBA" (rom)
+		//     else
+		//         boot is via FLASH
+		//         Selection is via gpnvm[2]
+		//     endif
+		//
+		// NOTE: banks 0 & 1 switch places
+		//     if gpnvm[2] == 0
+		//         Bank0 is the boot rom
+		//      else
+		//         Bank1 is the boot rom
+		//      endif
+//		.bank[0] = {
+		{
+		  {
+			.probed = 0,
+			.pChip  = NULL,
+			.pBank  = NULL,
+			.bank_number = 0,
+			.base_address = FLASH_BANK_BASE_N,
+			.controller_address = 0x400e0A00,
+			.present = 1,
+			.size_bytes = 128 * 1024,
+			.nsectors   = 8,
+			.sector_size = 16384,
+			.page_size   = 256,
+		  },
+
+//		.bank[1] = {
+		  {
+		  	.present = 0,
+			.probed = 0,
+			.bank_number = 1,
+		  },
+		},
+	},
+
+	{
+		.chipid_cidr    = 0x29390760,
+		.name           = "at91sam3n2a",
+		.total_flash_size     = 128 * 1024,
+		.total_sram_size      = 16 * 1024,
+		.n_gpnvms       = 3,
+		.n_banks        = 1,
+
+		// System boots at address 0x0
+		// gpnvm[1] = selects boot code
+		//     if gpnvm[1] == 0
+		//         boot is via "SAMBA" (rom)
+		//     else
+		//         boot is via FLASH
+		//         Selection is via gpnvm[2]
+		//     endif
+		//
+		// NOTE: banks 0 & 1 switch places
+		//     if gpnvm[2] == 0
+		//         Bank0 is the boot rom
+		//      else
+		//         Bank1 is the boot rom
+		//      endif
+//		.bank[0] = {
+		{
+		  {
+			.probed = 0,
+			.pChip  = NULL,
+			.pBank  = NULL,
+			.bank_number = 0,
+			.base_address = FLASH_BANK_BASE_N,
+			.controller_address = 0x400e0A00,
+			.present = 1,
+			.size_bytes = 128 * 1024,
+			.nsectors   = 8,
+			.sector_size = 16384,
+			.page_size   = 256,
+		  },
+
+//		.bank[1] = {
+		  {
+		  	.present = 0,
+			.probed = 0,
+			.bank_number = 1,
+		  },
+		},
+	},
+
+	{
+		.chipid_cidr    = 0x29580560,
+		.name           = "at91sam3n1c",
+		.total_flash_size     = 64 * 1024,
+		.total_sram_size      = 8 * 1024,
+		.n_gpnvms       = 3,
+		.n_banks        = 1,
+
+		// System boots at address 0x0
+		// gpnvm[1] = selects boot code
+		//     if gpnvm[1] == 0
+		//         boot is via "SAMBA" (rom)
+		//     else
+		//         boot is via FLASH
+		//         Selection is via gpnvm[2]
+		//     endif
+		//
+		// NOTE: banks 0 & 1 switch places
+		//     if gpnvm[2] == 0
+		//         Bank0 is the boot rom
+		//      else
+		//         Bank1 is the boot rom
+		//      endif
+//		.bank[0] = {
+		{
+		  {
+			.probed = 0,
+			.pChip  = NULL,
+			.pBank  = NULL,
+			.bank_number = 0,
+			.base_address = FLASH_BANK_BASE_N,
+			.controller_address = 0x400e0A00,
+			.present = 1,
+			.size_bytes = 64 * 1024,
+			.nsectors   = 4,
+			.sector_size = 16384,
+			.page_size   = 256,
+		  },
+
+//		.bank[1] = {
+		  {
+		  	.present = 0,
+			.probed = 0,
+			.bank_number = 1,
+		  },
+		},
+	},
+
+	{
+		.chipid_cidr    = 0x29480560,
+		.name           = "at91sam3n1b",
+		.total_flash_size     = 64 * 1024,
+		.total_sram_size      = 8 * 1024,
+		.n_gpnvms       = 3,
+		.n_banks        = 1,
+
+		// System boots at address 0x0
+		// gpnvm[1] = selects boot code
+		//     if gpnvm[1] == 0
+		//         boot is via "SAMBA" (rom)
+		//     else
+		//         boot is via FLASH
+		//         Selection is via gpnvm[2]
+		//     endif
+		//
+		// NOTE: banks 0 & 1 switch places
+		//     if gpnvm[2] == 0
+		//         Bank0 is the boot rom
+		//      else
+		//         Bank1 is the boot rom
+		//      endif
+//		.bank[0] = {
+		{
+		  {
+			.probed = 0,
+			.pChip  = NULL,
+			.pBank  = NULL,
+			.bank_number = 0,
+			.base_address = FLASH_BANK_BASE_N,
+			.controller_address = 0x400e0A00,
+			.present = 1,
+			.size_bytes = 64 * 1024,
+			.nsectors   = 4,
+			.sector_size = 16384,
+			.page_size   = 256,
+		  },
+
+//		.bank[1] = {
+		  {
+		  	.present = 0,
+			.probed = 0,
+			.bank_number = 1,
+		  },
+		},
+	},
+
+	{
+		.chipid_cidr    = 0x29380560,
+		.name           = "at91sam3n1a",
+		.total_flash_size     = 64 * 1024,
+		.total_sram_size      = 8 * 1024,
+		.n_gpnvms       = 3,
+		.n_banks        = 1,
+
+		// System boots at address 0x0
+		// gpnvm[1] = selects boot code
+		//     if gpnvm[1] == 0
+		//         boot is via "SAMBA" (rom)
+		//     else
+		//         boot is via FLASH
+		//         Selection is via gpnvm[2]
+		//     endif
+		//
+		// NOTE: banks 0 & 1 switch places
+		//     if gpnvm[2] == 0
+		//         Bank0 is the boot rom
+		//      else
+		//         Bank1 is the boot rom
+		//      endif
+//		.bank[0] = {
+		{
+		  {
+			.probed = 0,
+			.pChip  = NULL,
+			.pBank  = NULL,
+			.bank_number = 0,
+			.base_address = FLASH_BANK_BASE_N,
+			.controller_address = 0x400e0A00,
+			.present = 1,
+			.size_bytes = 64 * 1024,
+			.nsectors   = 4,
+			.sector_size = 16384,
+			.page_size   = 256,
+		  },
+
+//		.bank[1] = {
+		  {
+		  	.present = 0,
+			.probed = 0,
+			.bank_number = 1,
+		  },
+		},
+	},
+
 	// terminate
 	{
 		.chipid_cidr	= 0,
@@ -1974,6 +2411,7 @@ FLASH_BANK_COMMAND_HANDLER(sam3_flash_bank_command)
 		bank->bank_number = 1;
 		pChip->details.bank[1].pChip = pChip;
 		pChip->details.bank[1].pBank = bank;
+		break;
 
 	// at91sam3s series
 	case FLASH_BANK_BASE_S:
@@ -1999,7 +2437,8 @@ sam3_GetDetails(struct sam3_bank_private *pPrivate)
 	LOG_DEBUG("Begin");
 	pDetails = all_sam3_details;
 	while (pDetails->name) {
-		if (pDetails->chipid_cidr == pPrivate->pChip->cfg.CHIPID_CIDR) {
+		// Compare cidr without version bits
+		if (pDetails->chipid_cidr == (pPrivate->pChip->cfg.CHIPID_CIDR & 0xFFFFFFE0)) {
 			break;
 		} else {
 			pDetails++;
@@ -2090,8 +2529,8 @@ _sam3_probe(struct flash_bank *bank, int noise)
 
 	// update the flash bank size
 	for (x = 0 ; x < SAM3_MAX_FLASH_BANKS ; x++) {
-		if (bank->base == pPrivate->pChip->details.bank[0].base_address) {
-			bank->size =  pPrivate->pChip->details.bank[0].size_bytes;
+		if (bank->base == pPrivate->pChip->details.bank[x].base_address) {
+			bank->size =  pPrivate->pChip->details.bank[x].size_bytes;
 			break;
 		}
 	}