X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fflash%2Fnor%2Flpc2000.c;h=438ab544c21be51684a06377d3febb87768c91ef;hb=e018c7c1d29e8dabb9b4a90bb9eb3574eb1668bb;hp=6674f171aa550ddbc64cb5eab117c77bc7e0e071;hpb=a851ce0d6f2b961f94e09746304e0fb0dad6a15f;p=openocd.git diff --git a/src/flash/nor/lpc2000.c b/src/flash/nor/lpc2000.c index 6674f171aa..438ab544c2 100644 --- a/src/flash/nor/lpc2000.c +++ b/src/flash/nor/lpc2000.c @@ -33,7 +33,15 @@ #include -/* flash programming support for NXP LPC17xx and LPC2xxx devices +/** + * @file + * flash programming support for NXP LPC17xx and LPC2xxx devices. + * + * @todo Provide a way to update CCLK after declaring the flash bank. + * The value which is correct after chip reset will rarely still work + * right after the clocks switch to use the PLL (e.g. 4MHz --> 100 MHz). + */ +/* * currently supported devices: * variant 1 (lpc2000_v1): * - 2104 | 5 | 6