X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fflash%2Fnor%2Flpcspifi.c;h=828c60ca6e0e0bd9ecd8337d7773f625d6e19792;hb=7ce8624dbfc3c26a4dfb7ca089a99ccf52a8539b;hp=7355c30a9ceacc627e9a6d80e1d7d253311cc26a;hpb=970a12aef41c227ff6c6b59fed66a253a806d7ee;p=openocd.git

diff --git a/src/flash/nor/lpcspifi.c b/src/flash/nor/lpcspifi.c
index 7355c30a9c..828c60ca6e 100644
--- a/src/flash/nor/lpcspifi.c
+++ b/src/flash/nor/lpcspifi.c
@@ -13,9 +13,7 @@
  *   GNU General Public License for more details.                          *
  *                                                                         *
  *   You should have received a copy of the GNU General Public License     *
- *   along with this program; if not, write to the                         *
- *   Free Software Foundation, Inc.,                                       *
- *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
+ *   along with this program.  If not, see <http://www.gnu.org/licenses/>. *
  ***************************************************************************/
 
 #ifdef HAVE_CONFIG_H
@@ -58,21 +56,6 @@ struct lpcspifi_flash_bank {
 	const struct flash_device *dev;
 };
 
-struct lpcspifi_target {
-	char *name;
-	uint32_t tap_idcode;
-	uint32_t spifi_base;
-	uint32_t ssp_base;
-	uint32_t io_base;
-	uint32_t ioconfig_base; /* base address for the port word pin registers */
-};
-
-static const struct lpcspifi_target target_devices[] = {
-	/* name,          tap_idcode, spifi_base, ssp_base,   io_base,    ioconfig_base */
-	{ "LPC43xx/18xx", 0x4ba00477, 0x14000000, 0x40083000, 0x400F4000, 0x40086000 },
-	{ NULL,           0,          0,          0,          0,          0 }
-};
-
 /* flash_bank lpcspifi <base> <size> <chip_width> <bus_width> <target>
  */
 FLASH_BANK_COMMAND_HANDLER(lpcspifi_flash_bank_command)
@@ -123,7 +106,7 @@ static int ssp_setcs(struct target *target, uint32_t io_base, unsigned int value
  * and the controller is idle. */
 static int poll_ssp_busy(struct target *target, uint32_t ssp_base, int timeout)
 {
-	long long endtime;
+	int64_t endtime;
 	uint32_t value;
 	int retval;
 
@@ -203,7 +186,7 @@ static int lpcspifi_set_hw_mode(struct flash_bank *bank)
 		return retval;
 	}
 
-	LOG_DEBUG("Writing algorithm to working area at 0x%08" PRIx32,
+	LOG_DEBUG("Writing algorithm to working area at 0x%08" TARGET_PRIxADDR,
 		spifi_init_algorithm->address);
 	/* Write algorithm to working area */
 	retval = target_write_buffer(target,
@@ -342,7 +325,7 @@ static int wait_till_ready(struct flash_bank *bank, int timeout)
 {
 	uint32_t status;
 	int retval;
-	long long endtime;
+	int64_t endtime;
 
 	endtime = timeval_ms() + timeout;
 	do {
@@ -688,7 +671,8 @@ static int lpcspifi_write(struct flash_bank *bank, const uint8_t *buffer,
 		0x00, 0xf0, 0x02, 0xb8, 0x4f, 0xf0, 0x00, 0x08,
 		0x4f, 0xf4, 0x80, 0x4a, 0xc4, 0xf2, 0x0f, 0x0a,
 		0xca, 0xf8, 0xab, 0x80, 0x70, 0x47, 0x00, 0x20,
-		0x50, 0x60, 0x30, 0x46, 0x00, 0xbe, 0xff, 0xff
+		0x50, 0x60, 0xff, 0xf7, 0xef, 0xff, 0x30, 0x46,
+		0x00, 0xbe, 0xff, 0xff
 	};
 
 	if (target_alloc_working_area(target, sizeof(lpcspifi_flash_write_code),
@@ -697,7 +681,7 @@ static int lpcspifi_write(struct flash_bank *bank, const uint8_t *buffer,
 			" a working area > %zdB in order to write to SPIFI flash.",
 			sizeof(lpcspifi_flash_write_code));
 		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-	};
+	}
 
 	retval = target_write_buffer(target, write_algorithm->address,
 			sizeof(lpcspifi_flash_write_code),
@@ -733,7 +717,7 @@ static int lpcspifi_write(struct flash_bank *bank, const uint8_t *buffer,
 	if (target_alloc_working_area(target, fifo_size, &fifo) != ERROR_OK) {
 		target_free_working_area(target, write_algorithm);
 		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-	};
+	}
 
 	armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
 	armv7m_info.core_mode = ARM_MODE_THREAD;
@@ -851,14 +835,9 @@ static int lpcspifi_read_flash_id(struct flash_bank *bank, uint32_t *id)
 
 static int lpcspifi_probe(struct flash_bank *bank)
 {
-	struct target *target = bank->target;
 	struct lpcspifi_flash_bank *lpcspifi_info = bank->driver_priv;
-	uint32_t ssp_base;
-	uint32_t io_base;
-	uint32_t ioconfig_base;
 	struct flash_sector *sectors;
 	uint32_t id = 0; /* silence uninitialized warning */
-	const struct lpcspifi_target *target_device;
 	int retval;
 
 	/* If we've already probed, we should be fine to skip this time. */
@@ -866,26 +845,11 @@ static int lpcspifi_probe(struct flash_bank *bank)
 		return ERROR_OK;
 	lpcspifi_info->probed = 0;
 
-	for (target_device = target_devices ; target_device->name ; ++target_device)
-		if (target_device->tap_idcode == target->tap->idcode)
-			break;
-	if (!target_device->name) {
-		LOG_ERROR("Device ID 0x%" PRIx32 " is not known as SPIFI capable",
-				target->tap->idcode);
-		return ERROR_FAIL;
-	}
-
-	ssp_base = target_device->ssp_base;
-	io_base = target_device->io_base;
-	ioconfig_base = target_device->ioconfig_base;
-	lpcspifi_info->ssp_base = ssp_base;
-	lpcspifi_info->io_base = io_base;
-	lpcspifi_info->ioconfig_base = ioconfig_base;
+	lpcspifi_info->ssp_base = 0x40083000;
+	lpcspifi_info->io_base = 0x400F4000;
+	lpcspifi_info->ioconfig_base = 0x40086000;
 	lpcspifi_info->bank_num = bank->bank_number;
 
-	LOG_DEBUG("Valid SPIFI on device %s at address 0x%" PRIx32,
-		target_device->name, bank->base);
-
 	/* read and decode flash ID; returns in SW mode */
 	retval = lpcspifi_read_flash_id(bank, &id);
 	if (retval != ERROR_OK)
@@ -978,4 +942,5 @@ struct flash_driver lpcspifi_flash = {
 	.erase_check = default_flash_blank_check,
 	.protect_check = lpcspifi_protect_check,
 	.info = get_lpcspifi_info,
+	.free_driver_priv = default_flash_free_driver_priv,
 };