X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fnrf51.c;h=7c2fa13f55844e57bd96670ca7ff7abd3585e9f0;hb=8674d3f64ae9f6159a6b5f6bb372c2b4792fca53;hp=af412e2827565ac83ff09213cc05c636624bf7a0;hpb=233f8859c0e5d0f6b94beba5435b56bda27c30e1;p=openocd.git diff --git a/src/flash/nor/nrf51.c b/src/flash/nor/nrf51.c index af412e2827..7c2fa13f55 100644 --- a/src/flash/nor/nrf51.c +++ b/src/flash/nor/nrf51.c @@ -128,23 +128,62 @@ struct nrf51_device_spec { unsigned int flash_size_kb; }; +/* The known devices table below is derived from the "nRF51 Series + * Compatibility Matrix" document, which can be found by searching for + * ATTN-51 on the Nordic Semi website: + * + * http://www.nordicsemi.com/eng/content/search?SearchText=ATTN-51 + * + * Up to date with Matrix v2.0, plus some additional HWIDs. + * + * The additional HWIDs apply where the build code in the matrix is + * shown as Gx0, Bx0, etc. In these cases the HWID in the matrix is + * for x==0, x!=0 means different (unspecified) HWIDs. + */ static const struct nrf51_device_spec nrf51_known_devices_table[] = { + /* nRF51822 Devices (IC rev 1). */ { .hwid = 0x001D, .variant = "QFAA", .build_code = "CA/C0", .flash_size_kb = 256, }, + { + .hwid = 0x0026, + .variant = "QFAB", + .build_code = "AA", + .flash_size_kb = 128, + }, + { + .hwid = 0x0027, + .variant = "QFAB", + .build_code = "A0", + .flash_size_kb = 128, + }, + { + .hwid = 0x0020, + .variant = "CEAA", + .build_code = "BA", + .flash_size_kb = 256, + }, + { + .hwid = 0x002F, + .variant = "CEAA", + .build_code = "B0", + .flash_size_kb = 256, + }, + + /* nRF51822 Devices (IC rev 2). */ { .hwid = 0x002A, .variant = "QFAA", - .build_code = "FA", + .build_code = "FA0", .flash_size_kb = 256, }, { .hwid = 0x0044, .variant = "QFAA", - .build_code = "GC", + .build_code = "GC0", .flash_size_kb = 256, }, { @@ -153,57 +192,168 @@ static const struct nrf51_device_spec nrf51_known_devices_table[] = { .build_code = "G0", .flash_size_kb = 256, }, - - { - .hwid = 0x0020, - .variant = "CEAA", - .build_code = "BA", - .flash_size_kb = 256, - }, { - .hwid = 0x002F, - .variant = "CEAA", + .hwid = 0x004C, + .variant = "QFAB", .build_code = "B0", - .flash_size_kb = 256, + .flash_size_kb = 128, }, { .hwid = 0x0040, .variant = "CEAA", - .build_code = "CA", + .build_code = "CA0", .flash_size_kb = 256, }, { .hwid = 0x0047, .variant = "CEAA", - .build_code = "DA", + .build_code = "DA0", .flash_size_kb = 256, }, { .hwid = 0x004D, .variant = "CEAA", - .build_code = "D0", + .build_code = "D00", .flash_size_kb = 256, }, + /* nRF51822 Devices (IC rev 3). */ { - .hwid = 0x0026, + .hwid = 0x0072, + .variant = "QFAA", + .build_code = "H0", + .flash_size_kb = 256, + }, + { + .hwid = 0x007B, .variant = "QFAB", - .build_code = "AA", + .build_code = "C0", .flash_size_kb = 128, }, { - .hwid = 0x0027, - .variant = "QFAB", + .hwid = 0x0083, + .variant = "QFAC", + .build_code = "A0", + .flash_size_kb = 256, + }, + { + .hwid = 0x007D, + .variant = "CDAB", .build_code = "A0", .flash_size_kb = 128, }, { - .hwid = 0x004C, + .hwid = 0x0079, + .variant = "CEAA", + .build_code = "E0", + .flash_size_kb = 256, + }, + { + .hwid = 0x0087, + .variant = "CFAC", + .build_code = "A0", + .flash_size_kb = 256, + }, + + /* nRF51422 Devices (IC rev 1). */ + { + .hwid = 0x001E, + .variant = "QFAA", + .build_code = "CA", + .flash_size_kb = 256, + }, + { + .hwid = 0x0024, + .variant = "QFAA", + .build_code = "C0", + .flash_size_kb = 256, + }, + { + .hwid = 0x0031, + .variant = "CEAA", + .build_code = "A0A", + .flash_size_kb = 256, + }, + + /* nRF51422 Devices (IC rev 2). */ + { + .hwid = 0x002D, + .variant = "QFAA", + .build_code = "DAA", + .flash_size_kb = 256, + }, + { + .hwid = 0x002E, + .variant = "QFAA", + .build_code = "E0", + .flash_size_kb = 256, + }, + { + .hwid = 0x0061, + .variant = "QFAB", + .build_code = "A00", + .flash_size_kb = 128, + }, + { + .hwid = 0x0050, + .variant = "CEAA", + .build_code = "B0", + .flash_size_kb = 256, + }, + + /* nRF51422 Devices (IC rev 3). */ + { + .hwid = 0x0073, + .variant = "QFAA", + .build_code = "F0", + .flash_size_kb = 256, + }, + { + .hwid = 0x007C, .variant = "QFAB", .build_code = "B0", .flash_size_kb = 128, }, + { + .hwid = 0x0085, + .variant = "QFAC", + .build_code = "A0", + .flash_size_kb = 256, + }, + { + .hwid = 0x0086, + .variant = "QFAC", + .build_code = "A1", + .flash_size_kb = 256, + }, + { + .hwid = 0x007E, + .variant = "CDAB", + .build_code = "A0", + .flash_size_kb = 128, + }, + { + .hwid = 0x007A, + .variant = "CEAA", + .build_code = "C0", + .flash_size_kb = 256, + }, + { + .hwid = 0x0088, + .variant = "CFAC", + .build_code = "A0", + .flash_size_kb = 256, + }, + /* Some early nRF51-DK (PCA10028) & nRF51-Dongle (PCA10031) boards + with built-in jlink seem to use engineering samples not listed + in the nRF51 Series Compatibility Matrix V1.0. */ + { + .hwid = 0x0071, + .variant = "QFAC", + .build_code = "AB", + .flash_size_kb = 256, + }, }; static int nrf51_bank_is_probed(struct flash_bank *bank) @@ -577,7 +727,7 @@ static int nrf51_erase_page(struct flash_bank *bank, LOG_DEBUG("Erasing page at 0x%"PRIx32, sector->offset); if (sector->is_protected) { - LOG_ERROR("Cannot erase protected sector at 0x%x", sector->offset); + LOG_ERROR("Cannot erase protected sector at 0x%" PRIx32, sector->offset); return ERROR_FAIL; }