X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fpic32mx.c;h=248e0615761a0874e5a8d51ecf9091d7b76cc8de;hb=9cc733ae312dd79471f4cc5116f675116d5176b3;hp=242780ff96ea7f94fd6e51932b676cd9561e262d;hpb=9f0cba528a163645c8ecace413731c23310f2c26;p=openocd.git

diff --git a/src/flash/nor/pic32mx.c b/src/flash/nor/pic32mx.c
index 242780ff96..248e061576 100644
--- a/src/flash/nor/pic32mx.c
+++ b/src/flash/nor/pic32mx.c
@@ -51,6 +51,7 @@
 
 /* pic32mx configuration register locations */
 
+#define PIC32MX_DEVCFG0_1_2	0xBFC00BFC
 #define PIC32MX_DEVCFG0		0xBFC02FFC
 #define PIC32MX_DEVCFG1		0xBFC02FF8
 #define PIC32MX_DEVCFG2		0xBFC02FF4
@@ -91,13 +92,16 @@
 #define NVMKEY1			0xAA996655
 #define NVMKEY2			0x556699AA
 
+#define MX_1_2			1	/* PIC32mx1xx/2xx */
+
 struct pic32mx_flash_bank {
 	struct working_area *write_algorithm;
 	int probed;
+	int dev_type;		/* Default 0. 1 for Pic32MX1XX/2XX variant */
 };
 
 /*
- * DEVID values as per PIC32MX Flash Programming Specification Rev H
+ * DEVID values as per PIC32MX Flash Programming Specification Rev J
  */
 
 static const struct pic32mx_devs_s {
@@ -110,12 +114,24 @@ static const struct pic32mx_devs_s {
 	{0x04A06053, "120F032B"},
 	{0x04A08053, "120F032C"},
 	{0x04A0A053, "120F032D"},
+	{0x04D07053, "130F064B"},
+	{0x04D09053, "130F064C"},
+	{0x04D0B053, "130F064D"},
+	{0x04D06053, "150F128B"},
+	{0x04D08053, "150F128C"},
+	{0x04D0A053, "150F128D"},
 	{0x04A01053, "210F016B"},
 	{0x04A03053, "210F016C"},
 	{0x04A05053, "210F016D"},
 	{0x04A00053, "220F032B"},
 	{0x04A02053, "220F032C"},
 	{0x04A04053, "220F032D"},
+	{0x04D01053, "230F064B"},
+	{0x04D03053, "230F064C"},
+	{0x04D05053, "230F064D"},
+	{0x04D00053, "250F128B"},
+	{0x04D02053, "250F128C"},
+	{0x04D04053, "250F128D"},
 	{0x00938053, "360F512L"},
 	{0x00934053, "360F256L"},
 	{0x0092D053, "340F128L"},
@@ -178,6 +194,7 @@ FLASH_BANK_COMMAND_HANDLER(pic32mx_flash_bank_command)
 
 	pic32mx_info->write_algorithm = NULL;
 	pic32mx_info->probed = 0;
+	pic32mx_info->dev_type = 0;
 
 	return ERROR_OK;
 }
@@ -232,7 +249,9 @@ static int pic32mx_nvm_exec(struct flash_bank *bank, uint32_t op, uint32_t timeo
 static int pic32mx_protect_check(struct flash_bank *bank)
 {
 	struct target *target = bank->target;
+	struct pic32mx_flash_bank *pic32mx_info = bank->driver_priv;
 
+	uint32_t config0_address;
 	uint32_t devcfg0;
 	int s;
 	int num_pages;
@@ -242,7 +261,12 @@ static int pic32mx_protect_check(struct flash_bank *bank)
 		return ERROR_TARGET_NOT_HALTED;
 	}
 
-	target_read_u32(target, PIC32MX_DEVCFG0, &devcfg0);
+	if (pic32mx_info->dev_type == MX_1_2)
+		config0_address = PIC32MX_DEVCFG0_1_2;
+	else
+		config0_address = PIC32MX_DEVCFG0;
+
+	target_read_u32(target, config0_address, &devcfg0);
 
 	if ((devcfg0 & (1 << 28)) == 0) /* code protect bit */
 		num_pages = 0xffff;			/* All pages protected */
@@ -315,7 +339,7 @@ static int pic32mx_protect(struct flash_bank *bank, int set, int first, int last
 
 /* see contib/loaders/flash/pic32mx.s for src */
 
-static const uint32_t pic32mx_flash_write_code[] = {
+static uint32_t pic32mx_flash_write_code[] = {
 					/* write: */
 	0x3C08AA99,		/* lui $t0, 0xaa99 */
 	0x35086655,		/* ori $t0, 0x6655 */
@@ -402,6 +426,21 @@ static int pic32mx_write_block(struct flash_bank *bank, uint8_t *buffer,
 		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 	};
 
+	/* Change values for counters and row size, depending on variant */
+	if (pic32mx_info->dev_type == MX_1_2) {
+		/* 128 byte row */
+		pic32mx_flash_write_code[8] = 0x2CD30020;
+		pic32mx_flash_write_code[14] = 0x24840080;
+		pic32mx_flash_write_code[15] = 0x24A50080;
+		pic32mx_flash_write_code[17] = 0x24C6FFE0;
+	} else {
+		/* 512 byte row */
+		pic32mx_flash_write_code[8] = 0x2CD30080;
+		pic32mx_flash_write_code[14] = 0x24840200;
+		pic32mx_flash_write_code[15] = 0x24A50200;
+		pic32mx_flash_write_code[17] = 0x24C6FF80;
+	}
+
 	retval = target_write_buffer(target, pic32mx_info->write_algorithm->address,
 			sizeof(pic32mx_flash_write_code), (uint8_t *)pic32mx_flash_write_code);
 	if (retval != ERROR_OK)
@@ -598,7 +637,20 @@ static int pic32mx_probe(struct flash_bank *bank)
 		return ERROR_FLASH_OPERATION_FAILED;
 	}
 
-	page_size = 4096;
+	/* Check for PIC32mx1xx/2xx */
+	for (i = 0; pic32mx_devs[i].name != NULL; i++) {
+		if (pic32mx_devs[i].devid == (device_id & 0x0fffffff)) {
+			if ((*(pic32mx_devs[i].name) == '1') || (*(pic32mx_devs[i].name) == '2'))
+				pic32mx_info->dev_type = MX_1_2;
+			break;
+		}
+	}
+
+	if (pic32mx_info->dev_type == MX_1_2)
+		page_size = 1024;
+	else
+		page_size = 4096;
+
 
 	if (Virt2Phys(bank->base) == PIC32MX_PHYS_BOOT_FLASH) {
 		/* 0x1FC00000: Boot flash size */
@@ -612,13 +664,21 @@ static int pic32mx_probe(struct flash_bank *bank)
 		}
 #else
 		/* fixed 12k boot bank - see comments above */
-		num_pages = (12 * 1024);
+		if (pic32mx_info->dev_type == MX_1_2)
+			num_pages = (3 * 1024);
+		else
+			num_pages = (12 * 1024);
 #endif
 	} else {
 		/* read the flash size from the device */
 		if (target_read_u32(target, PIC32MX_BMXPFMSZ, &num_pages) != ERROR_OK) {
-			LOG_WARNING("PIC32MX flash size failed, probe inaccurate - assuming 512k flash");
-			num_pages = (512 * 1024);
+			if (pic32mx_info->dev_type == MX_1_2) {
+				LOG_WARNING("PIC32MX flash size failed, probe inaccurate - assuming 32k flash");
+				num_pages = (32 * 1024);
+			} else {
+				LOG_WARNING("PIC32MX flash size failed, probe inaccurate - assuming 512k flash");
+				num_pages = (512 * 1024);
+			}
 		}
 	}