X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fstellaris.c;h=851cab3344c00d6cb08c76998b43614834b458d0;hb=4749a40821de2dcc88cc02d3b3ab5a5418e02c2e;hp=f7e2e8d9df10079657a0ad36c070ee8fa5fe418b;hpb=86e851e1e263c79f19eb9db52553de99f19b8bb9;p=openocd.git

diff --git a/src/flash/nor/stellaris.c b/src/flash/nor/stellaris.c
index f7e2e8d9df..851cab3344 100644
--- a/src/flash/nor/stellaris.c
+++ b/src/flash/nor/stellaris.c
@@ -22,26 +22,110 @@
  ***************************************************************************/
 
 /***************************************************************************
-* STELLARIS is tested on LM3S811, LM3S6965
+* STELLARIS flash is tested on LM3S811, LM3S6965, LM3s3748, more.
 ***************************************************************************/
 #ifdef HAVE_CONFIG_H
 #include "config.h"
 #endif
 
 #include "imp.h"
-#include "stellaris.h"
 #include <target/algorithm.h>
 #include <target/armv7m.h>
 
 
 #define DID0_VER(did0) ((did0 >> 28)&0x07)
 
+/* STELLARIS control registers */
+#define SCB_BASE	0x400FE000
+#define DID0		0x000
+#define DID1		0x004
+#define DC0			0x008
+#define DC1			0x010
+#define DC2			0x014
+#define DC3			0x018
+#define DC4			0x01C
+
+#define RIS			0x050
+#define RCC			0x060
+#define PLLCFG		0x064
+#define RCC2		0x070
+#define NVMSTAT		0x1a0
+
+/* "legacy" flash memory protection registers (64KB max) */
+#define FMPRE		0x130
+#define FMPPE		0x134
+
+/* new flash memory protection registers (for more than 64KB) */
+#define FMPRE0		0x200		/* PRE1 = PRE0 + 4, etc */
+#define FMPPE0		0x400		/* PPE1 = PPE0 + 4, etc */
+
+#define USECRL		0x140
+
+#define FLASH_CONTROL_BASE	0x400FD000
+#define FLASH_FMA	(FLASH_CONTROL_BASE | 0x000)
+#define FLASH_FMD	(FLASH_CONTROL_BASE | 0x004)
+#define FLASH_FMC	(FLASH_CONTROL_BASE | 0x008)
+#define FLASH_CRIS	(FLASH_CONTROL_BASE | 0x00C)
+#define FLASH_CIM	(FLASH_CONTROL_BASE | 0x010)
+#define FLASH_MISC	(FLASH_CONTROL_BASE | 0x014)
+
+#define AMISC	1
+#define PMISC	2
+
+#define AMASK	1
+#define PMASK	2
+
+/* Flash Controller Command bits */
+#define FMC_WRKEY	(0xA442 << 16)
+#define FMC_COMT	(1 << 3)
+#define FMC_MERASE	(1 << 2)
+#define FMC_ERASE	(1 << 1)
+#define FMC_WRITE	(1 << 0)
+
+/* STELLARIS constants */
+
+/* values to write in FMA to commit write-"once" values */
+#define FLASH_FMA_PRE(x)	(2 * (x))	/* for FMPPREx */
+#define FLASH_FMA_PPE(x)	(2 * (x) + 1)	/* for FMPPPEx */
+
+
 static void stellaris_read_clock_info(struct flash_bank *bank);
 static int stellaris_mass_erase(struct flash_bank *bank);
 
+struct stellaris_flash_bank
+{
+	/* chip id register */
+	uint32_t did0;
+	uint32_t did1;
+	uint32_t dc0;
+	uint32_t dc1;
+
+	const char * target_name;
+
+	uint32_t sramsiz;
+	uint32_t flshsz;
+	/* flash geometry */
+	uint32_t num_pages;
+	uint32_t pagesize;
+	uint32_t pages_in_lockregion;
+
+	/* nv memory bits */
+	uint16_t num_lockbits;
+
+	/* main clock status */
+	uint32_t rcc;
+	uint32_t rcc2;
+	uint8_t  mck_valid;
+	uint8_t  xtal_mask;
+	uint32_t iosc_freq;
+	uint32_t mck_freq;
+	const char *iosc_desc;
+	const char *mck_desc;
+};
+
 static struct {
 	uint32_t partno;
-	char *partname;
+	const char *partname;
 }	StellarisParts[] =
 {
 	{0x0001,"LM3S101"},
@@ -255,7 +339,7 @@ FLASH_BANK_COMMAND_HANDLER(stellaris_flash_bank_command)
 	return ERROR_OK;
 }
 
-static int stellaris_info(struct flash_bank *bank, char *buf, int buf_size)
+static int get_stellaris_info(struct flash_bank *bank, char *buf, int buf_size)
 {
 	int printed, device_class;
 	struct stellaris_flash_bank *stellaris_info = bank->driver_priv;
@@ -773,6 +857,8 @@ static int stellaris_protect(struct flash_bank *bank, int set, int first, int la
 	return ERROR_OK;
 }
 
+/* see contib/loaders/flash/stellaris.s for src */
+
 static const uint8_t stellaris_write_code[] =
 {
 /*
@@ -816,7 +902,7 @@ static int stellaris_write_block(struct flash_bank *bank,
 		uint8_t *buffer, uint32_t offset, uint32_t wcount)
 {
 	struct target *target = bank->target;
-	uint32_t buffer_size = 8192;
+	uint32_t buffer_size = 16384;
 	struct working_area *source;
 	struct working_area *write_algorithm;
 	uint32_t address = bank->base + offset;
@@ -884,8 +970,7 @@ static int stellaris_write_block(struct flash_bank *bank,
 				(unsigned) (wcount - thisrun_count));
 		retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
 				write_algorithm->address,
-				write_algorithm->address +
-					sizeof(stellaris_write_code) - 10,
+				0,
 				10000, &armv7m_info);
 		if (retval != ERROR_OK)
 		{
@@ -1272,5 +1357,5 @@ struct flash_driver stellaris_flash = {
 	.auto_probe = stellaris_probe,
 	.erase_check = default_flash_mem_blank_check,
 	.protect_check = stellaris_protect_check,
-	.info = stellaris_info,
+	.info = get_stellaris_info,
 };