X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fstm32x.c;h=845d589de0da1b2fb2ad83cf889d8517d22ffdd8;hb=61c06359915cbaef5b8538d2600ecbc17d4b387c;hp=9e085767736d2e1e79b0074a16aa64a6d1214c74;hpb=37cc6c495f0b5fd2257aecdbde111ddfb6d8b083;p=openocd.git diff --git a/src/flash/nor/stm32x.c b/src/flash/nor/stm32x.c index 9e08576773..845d589de0 100644 --- a/src/flash/nor/stm32x.c +++ b/src/flash/nor/stm32x.c @@ -362,9 +362,11 @@ static int stm32x_protect(struct flash_bank *bank, int set, int first, int last) return ERROR_TARGET_NOT_HALTED; } - if ((first && (first % stm32x_info->ppage_size)) || ((last + 1) && (last + 1) % stm32x_info->ppage_size)) + if ((first && (first % stm32x_info->ppage_size)) || ((last + 1) && + (last + 1) % stm32x_info->ppage_size)) { - LOG_WARNING("Error: start and end sectors must be on a %d sector boundary", stm32x_info->ppage_size); + LOG_WARNING("Error: start and end sectors must be on a %d sector boundary", + stm32x_info->ppage_size); return ERROR_FLASH_SECTOR_INVALID; } @@ -432,7 +434,8 @@ static int stm32x_protect(struct flash_bank *bank, int set, int first, int last) return stm32x_write_options(bank); } -static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count) +static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, + uint32_t offset, uint32_t count) { struct stm32x_flash_bank *stm32x_info = bank->driver_priv; struct target *target = bank->target; @@ -443,7 +446,7 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t struct armv7m_algorithm armv7m_info; int retval = ERROR_OK; - uint8_t stm32x_flash_write_code[] = { + static const uint8_t stm32x_flash_write_code[] = { /* write: */ 0xDF, 0xF8, 0x24, 0x40, /* ldr r4, STM32_FLASH_CR */ 0x09, 0x4D, /* ldr r5, STM32_FLASH_SR */ @@ -459,20 +462,22 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t 0x01, 0xD1, /* bne exit */ 0x01, 0x3A, /* subs r2, r2, #1 */ 0xED, 0xD1, /* bne write */ - /* exit: */ - 0xFE, 0xE7, /* b exit */ + 0x00, 0xBE, /* bkpt #0 */ 0x10, 0x20, 0x02, 0x40, /* STM32_FLASH_CR: .word 0x40022010 */ 0x0C, 0x20, 0x02, 0x40 /* STM32_FLASH_SR: .word 0x4002200C */ }; /* flash write code */ - if (target_alloc_working_area(target, sizeof(stm32x_flash_write_code), &stm32x_info->write_algorithm) != ERROR_OK) + if (target_alloc_working_area(target, sizeof(stm32x_flash_write_code), + &stm32x_info->write_algorithm) != ERROR_OK) { LOG_WARNING("no working area available, can't do block memory writes"); return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; }; - if ((retval = target_write_buffer(target, stm32x_info->write_algorithm->address, sizeof(stm32x_flash_write_code), stm32x_flash_write_code)) != ERROR_OK) + if ((retval = target_write_buffer(target, stm32x_info->write_algorithm->address, + sizeof(stm32x_flash_write_code), + (uint8_t*)stm32x_flash_write_code)) != ERROR_OK) return retval; /* memory buffer */ @@ -481,7 +486,8 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t buffer_size /= 2; if (buffer_size <= 256) { - /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */ + /* if we already allocated the writing code, but failed to get a + * buffer, free the algorithm */ if (stm32x_info->write_algorithm) target_free_working_area(target, stm32x_info->write_algorithm); @@ -500,17 +506,21 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t while (count > 0) { - uint32_t thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count; + uint32_t thisrun_count = (count > (buffer_size / 2)) ? + (buffer_size / 2) : count; - if ((retval = target_write_buffer(target, source->address, thisrun_count * 2, buffer)) != ERROR_OK) + if ((retval = target_write_buffer(target, source->address, + thisrun_count * 2, buffer)) != ERROR_OK) break; buf_set_u32(reg_params[0].value, 0, 32, source->address); buf_set_u32(reg_params[1].value, 0, 32, address); buf_set_u32(reg_params[2].value, 0, 32, thisrun_count); - if ((retval = target_run_algorithm(target, 0, NULL, 4, reg_params, stm32x_info->write_algorithm->address, \ - stm32x_info->write_algorithm->address + (sizeof(stm32x_flash_write_code) - 10), 10000, &armv7m_info)) != ERROR_OK) + if ((retval = target_run_algorithm(target, 0, NULL, 4, reg_params, + stm32x_info->write_algorithm->address, + stm32x_info->write_algorithm->address + (sizeof(stm32x_flash_write_code) - 10), + 10000, &armv7m_info)) != ERROR_OK) { LOG_ERROR("error executing stm32x flash write algorithm"); retval = ERROR_FLASH_OPERATION_FAILED; @@ -551,7 +561,8 @@ static int stm32x_write_block(struct flash_bank *bank, uint8_t *buffer, uint32_t return retval; } -static int stm32x_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count) +static int stm32x_write(struct flash_bank *bank, uint8_t *buffer, + uint32_t offset, uint32_t count) { struct target *target = bank->target; uint32_t words_remaining = (count / 2); @@ -744,6 +755,21 @@ static int stm32x_probe(struct flash_bank *bank) num_pages = 256; } } + else if ((device_id & 0x7ff) == 0x420) + { + /* value line density - we have 1k pages + * 4 pages for a protection area */ + page_size = 1024; + stm32x_info->ppage_size = 4; + + /* check for early silicon */ + if (num_pages == 0xffff) + { + /* number of sectors may be incorrrect on early silicon */ + LOG_WARNING("STM32 flash size failed, probe inaccurate - assuming 128k flash"); + num_pages = 128; + } + } else { LOG_WARNING("Cannot identify target as a STM32 family."); @@ -885,6 +911,27 @@ static int stm32x_info(struct flash_bank *bank, char *buf, int buf_size) break; } } + else if ((device_id & 0x7ff) == 0x420) + { + printed = snprintf(buf, buf_size, "stm32x (Value) - Rev: "); + buf += printed; + buf_size -= printed; + + switch (device_id >> 16) + { + case 0x1000: + snprintf(buf, buf_size, "A"); + break; + + case 0x1001: + snprintf(buf, buf_size, "Z"); + break; + + default: + snprintf(buf, buf_size, "unknown"); + break; + } + } else { snprintf(buf, buf_size, "Cannot identify target as a stm32x\n"); @@ -978,7 +1025,9 @@ COMMAND_HANDLER(stm32x_handle_unlock_command) return ERROR_OK; } - command_print(CMD_CTX, "stm32x unlocked"); + command_print(CMD_CTX, "stm32x unlocked.\n" + "INFO: a reset or power cycle is required " + "for the new settings to take effect."); return ERROR_OK; } @@ -1066,29 +1115,36 @@ COMMAND_HANDLER(stm32x_handle_options_write_command) return ERROR_TARGET_NOT_HALTED; } + /* REVISIT: ignores some options which we will display... + * and doesn't insist on the specified syntax. + */ + + /* OPT_RDWDGSW */ if (strcmp(CMD_ARGV[1], "SWWDG") == 0) { optionbyte |= (1 << 0); } - else + else /* REVISIT must be "HWWDG" then ... */ { optionbyte &= ~(1 << 0); } + /* OPT_RDRSTSTDBY */ if (strcmp(CMD_ARGV[2], "NORSTSTNDBY") == 0) { optionbyte |= (1 << 1); } - else + else /* REVISIT must be "RSTSTNDBY" then ... */ { optionbyte &= ~(1 << 1); } + /* OPT_RDRSTSTOP */ if (strcmp(CMD_ARGV[3], "NORSTSTOP") == 0) { optionbyte |= (1 << 2); } - else + else /* REVISIT must be "RSTSTOP" then ... */ { optionbyte &= ~(1 << 2); } @@ -1107,7 +1163,9 @@ COMMAND_HANDLER(stm32x_handle_options_write_command) return ERROR_OK; } - command_print(CMD_CTX, "stm32x write options complete"); + command_print(CMD_CTX, "stm32x write options complete.\n" + "INFO: a reset or power cycle is required " + "for the new settings to take effect."); return ERROR_OK; } @@ -1186,41 +1244,44 @@ COMMAND_HANDLER(stm32x_handle_mass_erase_command) static const struct command_registration stm32x_exec_command_handlers[] = { { .name = "lock", - .handler = &stm32x_handle_lock_command, + .handler = stm32x_handle_lock_command, .mode = COMMAND_EXEC, - .usage = "", - .help = "lock device", + .usage = "bank_id", + .help = "Lock entire flash device.", }, { .name = "unlock", - .handler = &stm32x_handle_unlock_command, + .handler = stm32x_handle_unlock_command, .mode = COMMAND_EXEC, - .usage = "", - .help = "unlock protected device", + .usage = "bank_id", + .help = "Unlock entire protected flash device.", }, { .name = "mass_erase", - .handler = &stm32x_handle_mass_erase_command, + .handler = stm32x_handle_mass_erase_command, .mode = COMMAND_EXEC, - .usage = "", - .help = "mass erase device", + .usage = "bank_id", + .help = "Erase entire flash device.", }, { .name = "options_read", - .handler = &stm32x_handle_options_read_command, + .handler = stm32x_handle_options_read_command, .mode = COMMAND_EXEC, - .usage = "", - .help = "read device option bytes", + .usage = "bank_id", + .help = "Read and display device option byte.", }, { .name = "options_write", - .handler = &stm32x_handle_options_write_command, + .handler = stm32x_handle_options_write_command, .mode = COMMAND_EXEC, - .usage = " ", - .help = "write device option bytes", + .usage = "bank_id ('SWWDG'|'HWWDG') " + "('RSTSTNDBY'|'NORSTSTNDBY') " + "('RSTSTOP'|'NORSTSTOP')", + .help = "Replace bits in device option byte.", }, COMMAND_REGISTRATION_DONE }; + static const struct command_registration stm32x_command_handlers[] = { { .name = "stm32x", @@ -1232,15 +1293,15 @@ static const struct command_registration stm32x_command_handlers[] = { }; struct flash_driver stm32x_flash = { - .name = "stm32x", - .commands = stm32x_command_handlers, - .flash_bank_command = &stm32x_flash_bank_command, - .erase = &stm32x_erase, - .protect = &stm32x_protect, - .write = &stm32x_write, - .probe = &stm32x_probe, - .auto_probe = &stm32x_auto_probe, - .erase_check = &default_flash_mem_blank_check, - .protect_check = &stm32x_protect_check, - .info = &stm32x_info, - }; + .name = "stm32x", + .commands = stm32x_command_handlers, + .flash_bank_command = stm32x_flash_bank_command, + .erase = stm32x_erase, + .protect = stm32x_protect, + .write = stm32x_write, + .probe = stm32x_probe, + .auto_probe = stm32x_auto_probe, + .erase_check = default_flash_mem_blank_check, + .protect_check = stm32x_protect_check, + .info = stm32x_info, +};