X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fflash%2Fnor%2Fstr7x.c;h=b872bc3c0d388a2a56bcbb10e4060897fc8b41dd;hb=c69553cbc51770f61cf3b9225d46d058fa2544d0;hp=069e90c2e4ca3bec91c8a40e51a8f0bbc324b32f;hpb=9b5572857a3e42e0984b0daa3c478561337a0451;p=openocd.git diff --git a/src/flash/nor/str7x.c b/src/flash/nor/str7x.c index 069e90c2e4..b872bc3c0d 100644 --- a/src/flash/nor/str7x.c +++ b/src/flash/nor/str7x.c @@ -28,12 +28,94 @@ #endif #include "imp.h" -#include "str7x.h" #include #include #include +/* Flash registers */ + +#define FLASH_CR0 0x00000000 +#define FLASH_CR1 0x00000004 +#define FLASH_DR0 0x00000008 +#define FLASH_DR1 0x0000000C +#define FLASH_AR 0x00000010 +#define FLASH_ER 0x00000014 +#define FLASH_NVWPAR 0x0000DFB0 +#define FLASH_NVAPR0 0x0000DFB8 +#define FLASH_NVAPR1 0x0000DFBC + +/* FLASH_CR0 register bits */ + +#define FLASH_WMS 0x80000000 +#define FLASH_SUSP 0x40000000 +#define FLASH_WPG 0x20000000 +#define FLASH_DWPG 0x10000000 +#define FLASH_SER 0x08000000 +#define FLASH_SPR 0x01000000 +#define FLASH_BER 0x04000000 +#define FLASH_MER 0x02000000 +#define FLASH_LOCK 0x00000010 +#define FLASH_BSYA1 0x00000004 +#define FLASH_BSYA0 0x00000002 + +/* FLASH_CR1 register bits */ + +#define FLASH_B1S 0x02000000 +#define FLASH_B0S 0x01000000 +#define FLASH_B1F1 0x00020000 +#define FLASH_B1F0 0x00010000 +#define FLASH_B0F7 0x00000080 +#define FLASH_B0F6 0x00000040 +#define FLASH_B0F5 0x00000020 +#define FLASH_B0F4 0x00000010 +#define FLASH_B0F3 0x00000008 +#define FLASH_B0F2 0x00000004 +#define FLASH_B0F1 0x00000002 +#define FLASH_B0F0 0x00000001 + +/* FLASH_ER register bits */ + +#define FLASH_WPF 0x00000100 +#define FLASH_RESER 0x00000080 +#define FLASH_SEQER 0x00000040 +#define FLASH_10ER 0x00000008 +#define FLASH_PGER 0x00000004 +#define FLASH_ERER 0x00000002 +#define FLASH_ERR 0x00000001 + + +struct str7x_flash_bank +{ + uint32_t *sector_bits; + uint32_t disable_bit; + uint32_t busy_bits; + uint32_t register_base; + struct working_area *write_algorithm; +}; + +struct str7x_mem_layout { + uint32_t sector_start; + uint32_t sector_size; + uint32_t sector_bit; +}; + +enum str7x_status_codes +{ + STR7X_CMD_SUCCESS = 0, + STR7X_INVALID_COMMAND = 1, + STR7X_SRC_ADDR_ERROR = 2, + STR7X_DST_ADDR_ERROR = 3, + STR7X_SRC_ADDR_NOT_MAPPED = 4, + STR7X_DST_ADDR_NOT_MAPPED = 5, + STR7X_COUNT_ERROR = 6, + STR7X_INVALID_SECTOR = 7, + STR7X_SECTOR_NOT_BLANK = 8, + STR7X_SECTOR_NOT_PREPARED = 9, + STR7X_COMPARE_ERROR = 10, + STR7X_BUSY = 11 +}; + static struct str7x_mem_layout mem_layout_str7bank0[] = { {0x00000000, 0x02000, 0x01}, {0x00002000, 0x02000, 0x02}, @@ -243,10 +325,6 @@ static int str7x_result(struct flash_bank *bank) err = ERROR_FAIL; } } - if (err != ERROR_OK) - { - LOG_ERROR("FLASH_ER register contents: 0x%" PRIx32, retval); - } return retval; } @@ -406,6 +484,8 @@ static int str7x_write_block(struct flash_bank *bank, uint8_t *buffer, struct arm_algorithm armv4_5_info; int retval = ERROR_OK; + /* see contib/loaders/flash/str7x.s for src */ + static const uint32_t str7x_flash_write_code[] = { /* write: */ 0xe3a04201, /* mov r4, #0x10000000 */