X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fflash%2Fpic32mx.h;h=92f40c2e5f3b96086c4955374a12a597ec957506;hb=789d47c18097abb5ee6cc8544e0ba030000fd418;hp=49c8f5fa69baf19f836a43fe133e7afe80a94510;hpb=1840226d555b9863a2315bcc6218671fdfa2af32;p=openocd.git

diff --git a/src/flash/pic32mx.h b/src/flash/pic32mx.h
index 49c8f5fa69..92f40c2e5f 100644
--- a/src/flash/pic32mx.h
+++ b/src/flash/pic32mx.h
@@ -28,13 +28,13 @@
 
 #include "flash.h"
 
-typedef struct pic32mx_flash_bank_s
+struct pic32mx_flash_bank
 {
-	working_area_t *write_algorithm;
+	struct working_area *write_algorithm;
 	int devid;
 	int ppage_size;
 	int probed;
-} pic32mx_flash_bank_t;
+};
 
 #define PIC32MX_MANUF_ID	0x029
 
@@ -62,9 +62,9 @@ typedef struct pic32mx_flash_bank_s
  * Note: These macros only work for KSEG0/KSEG1 addresses.
  */
 #define KS1Virt2Phys(vaddr)			((vaddr)-0xA0000000)
-#define Phys2KS1Virt(paddr)			((paddr)+0xA0000000)
+#define Phys2KS1Virt(paddr)			((paddr) + 0xA0000000)
 #define KS0Virt2Phys(vaddr)			((vaddr)-0x80000000)
-#define Phys2KS0Virt(paddr)			((paddr)+0x80000000)
+#define Phys2KS0Virt(paddr)			((paddr) + 0x80000000)
 
 /* pic32mx configuration register locations */
 
@@ -80,11 +80,11 @@ typedef struct pic32mx_flash_bank_s
 #define PIC32MX_NVMCONCLR	0xBF80F404
 #define PIC32MX_NVMCONSET	0xBF80F408
 #define PIC32MX_NVMCONINV	0xBF80F40C
-#define NVMCON_NVMWR		(1<<15)
-#define NVMCON_NVMWREN		(1<<14)
-#define NVMCON_NVMERR		(1<<13)
-#define NVMCON_LVDERR		(1<<12)
-#define NVMCON_LVDSTAT		(1<<11)
+#define NVMCON_NVMWR		(1 << 15)
+#define NVMCON_NVMWREN		(1 << 14)
+#define NVMCON_NVMERR		(1 << 13)
+#define NVMCON_LVDERR		(1 << 12)
+#define NVMCON_LVDSTAT		(1 << 11)
 #define NVMCON_OP_PFM_ERASE		0x5
 #define NVMCON_OP_PAGE_ERASE	0x4
 #define NVMCON_OP_ROW_PROG		0x3
@@ -104,10 +104,10 @@ typedef struct pic32mx_flash_bank_s
 #define NVMKEY1			0xAA996655
 #define NVMKEY2			0x556699AA
 
-typedef struct pic32mx_mem_layout_s {
+struct pic32mx_mem_layout {
 	uint32_t sector_start;
 	uint32_t sector_size;
-} pic32mx_mem_layout_t;
+};
 
 #endif /* PIC32MX_H */