X-Git-Url: https://review.openocd.org/gitweb?a=blobdiff_plain;f=src%2Fflash%2Fs3c24xx_nand.h;h=4829c7c4f22eeb5d18ac759e781e2db18c36bbe3;hb=cbc13187c315227c0cf8d85fb0b92d0ba4a10dab;hp=f419352636eaf3482f877bbfcdf44cfe3b0265af;hpb=ee340df8417772b8c29a54ddf7b36556ec20d609;p=openocd.git diff --git a/src/flash/s3c24xx_nand.h b/src/flash/s3c24xx_nand.h index f419352636..4829c7c4f2 100644 --- a/src/flash/s3c24xx_nand.h +++ b/src/flash/s3c24xx_nand.h @@ -1,51 +1,86 @@ -/* src/flash/s3c24xx_nand.h - * +/*************************************************************************** + * Copyright (C) 2007, 2008 by Ben Dooks * + * ben@fluff.org * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ + +#ifndef S3C24xx_NAND_H +#define S3C24xx_NAND_H + +/* * S3C24XX Series OpenOCD NAND Flash controller support. * - * Copyright 2007,2008 Ben Dooks - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * * Many thanks to Simtec Electronics for sponsoring this work. */ -#include "target.h" +#include "nand.h" #include "s3c24xx_regs_nand.h" -typedef struct s3c24xx_nand_controller_s +struct s3c24xx_nand_controller { - struct target_s *target; - + struct target *target; + /* register addresses */ - u32 cmd; - u32 addr; - u32 data; - u32 nfstat; -} s3c24xx_nand_controller_t; + uint32_t cmd; + uint32_t addr; + uint32_t data; + uint32_t nfstat; +}; /* Default to using the un-translated NAND register based address */ #undef S3C2410_NFREG #define S3C2410_NFREG(x) ((x) + 0x4e000000) -extern s3c24xx_nand_controller_t *s3c24xx_nand_device_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct nand_device_s *device); +#define S3C24XX_DEVICE_COMMAND() \ + COMMAND_HELPER(s3c24xx_nand_device_command, \ + struct nand_device *nand, \ + struct s3c24xx_nand_controller **info) + +S3C24XX_DEVICE_COMMAND(); -extern int s3c24xx_register_commands(struct command_context_s *cmd_ctx); -extern int s3c24xx_reset(struct nand_device_s *device); -extern int s3c24xx_command(struct nand_device_s *device, u8 command); -extern int s3c24xx_address(struct nand_device_s *device, u8 address); -extern int s3c24xx_write_data(struct nand_device_s *device, u16 data); -extern int s3c24xx_read_data(struct nand_device_s *device, void *data); -extern int s3c24xx_controller_ready(struct nand_device_s *device, int tout); +#define CALL_S3C24XX_DEVICE_COMMAND(d, i) \ + do { \ + int retval = CALL_COMMAND_HANDLER(s3c24xx_nand_device_command, d, i); \ + if (ERROR_OK != retval) \ + return retval; \ + } while (0) + +int s3c24xx_register_commands(struct command_context *cmd_ctx); + +int s3c24xx_reset(struct nand_device *nand); + +int s3c24xx_command(struct nand_device *nand, uint8_t command); +int s3c24xx_address(struct nand_device *nand, uint8_t address); + +int s3c24xx_write_data(struct nand_device *nand, uint16_t data); +int s3c24xx_read_data(struct nand_device *nand, void *data); + +int s3c24xx_controller_ready(struct nand_device *nand, int tout); #define s3c24xx_write_page NULL #define s3c24xx_read_page NULL /* code shared between different controllers */ -extern int s3c2440_nand_ready(struct nand_device_s *device, int timeout); +int s3c2440_nand_ready(struct nand_device *nand, int timeout); + +int s3c2440_read_block_data(struct nand_device *nand, + uint8_t *data, int data_size); +int s3c2440_write_block_data(struct nand_device *nand, + uint8_t *data, int data_size); -extern int s3c2440_read_block_data(struct nand_device_s *, u8 *data, int data_size); -extern int s3c2440_write_block_data(struct nand_device_s *, u8 *data, int data_size); +#endif // S3C24xx_NAND_H